Open Source Echo Canceller Part 5 – Ready for Beta Testing

The continued trials and tribulations of echo canceller development! Since the last post the echo canceller (named Oslec) has been tested at several alpha sites. Oslec is performing well and is now ready for Beta testing. See the Oslec home page for the current status of the echo canceller.

The core of Oslec is the echo.c file.

Why X100P Cards Have Echo Problems

After the good results I obtained in the previous post I asked a few friends to test Oslec on their Asterisk systems. These guys were using X100P cards for the FXO interface. Oslec performed poorly so I asked them to collect some samples of the echo signal so I could analyse them off line. As part of the development strategy Oslec has built in echo sampling code.

Here is a plot of the X100P signals. Open it in another window or tab. Note that the green receive signal has a slight DC offset, it doesn’t quite sit on the zero line. Note also that the echo canceller output (blue) is quite large, i.e. the cancellation is poor.

There is also a series of small spikes on the green and blue signals – this is 60Hz hum that the X100P has mistakenly delivered to us. We don’t normally hear this hum as the phones we use tend to filter it out.

The combination of DC offset and 60 Hz hum confuses the echo canceller algorithm and make it converge slowly. This means poor performance and lots of echo.

The trick was to remove the hum and DC with a simple high pass filter. Here is a plot of the X100P signals with the high pass filter. To see the effect of the filter use your browsers forward and backward buttons to flick between the two images (with and without filtering).

See how the hum and DC offset have gone away after filtering? The green and blue lines are both now on the 0 line. But best of all the echo level (blue) has been greatly reduced, as without the hum and DC offset the echo canceller can do a much better job. Pretty cool, huh? DSP in action :-)

The observant will also note a DC offset on the (red) transmit signal. I am not sure why this is present, it’s in the signal from the SIP phone in this particular test. Perhaps a DC offset in the SIP phone electronics.

Since the filter was added Oslec has been in constant use on a X100P home IP-PBX system in Ottawa with great results.

This is an exciting result – it means low cost ($10) FXO hardware can have high quality echo cancellation.

Handling Background Noise

Inside echo cancellers there is an animal called a “Non Linear Processor” or NLP. After the adaptive filter part of the echo canceller has done it’s best this gizmo is used to remove any remaining echo.

Initially Oslec had a very simple mute algorithm – if the residual echo level was low enough the output would be muted. You can see this muting in action in the X100P plot above. Around sample 1000, the blue line “flat lines” as the NLP cuts off any residual echo.

The problem is that muting is crude – it removes echo but also throws out the background noise. Without background noise the calls sounds unnatural.

I experimented with a couple of ideas here. The first was to insert “comfort noise” instead of muting. The level of the noise is set to match that of the background noise level. However the noise I used sounded unnatural compared to the actual background noise (which in my office is computer fans).

The best NLP solution I have found so far is simply to clip the residual echo signal to the level of the background noise:
/* This sounds much better than CNG */
if (ec->clean_nlp > ec->Lbgn)
ec->clean_nlp = ec->Lbgn;
if (ec->clean_nlp < -ec->Lbgn)
ec->clean_nlp = -ec->Lbgn;

This works surprisingly well, even very weird background noise like a lawnmower working in my backyard came through fine and I still couldn’t hear any echo. BTW I found the idea of clipping on the data sheet of a commercial “hardware” echo cancellation chip.

I struggled with the code to estimate the background noise level for some time before settling on a really simple algorithm. I just average the level using a slow (1 second time const) filter if the current level is less than a (experimentally derived) constant:
if (ec->Lclean < 40) {
ec->Lbgn_acc = abs(ec->clean) - ec->Lbgn;
ec->Lbgn = (ec->Lbgn_acc (1<<11)) >> 12;
}

The 40 was measured experimentally, and is roughly the lowest level of any near end speech. The idea is that we don’t want to include any near end speech (which is generally higher in level than background noise) in our estimate of the background noise level. This estimator has worked well to date however I would welcome feedback from beta testers on Oslec background noise performance.

Fun with Soft Phones

One gentleman (Pavel) who tested Oslec complained of echo break through with pop sounds like “P” in Peter. He was using a kiax soft phone connected to an FXO port via Asterisk. The problem was due to a interesting combination of high quality audio (the microphone and sound blaster) and the telephone network.

Pavel had initially thought his microphone was faulty is some way, however it turns out it was too good! The microphone/sound blaster combination lets low frequency signals (e.g. down to 20Hz) through to the FXO Port. However the FXO port electronics (in particular the hybrid) is designed for telephone bandwidth signals (300-3300Hz). The results was a temporary failure of the hybrid, which let some echo slip through.

Figure 1 is a close up of the “pop” waveform. The red line (tx) is the microphone signal. Note how around sample 300 it goes down off the screen then comes back up around sample 400. This signal is very low frequency compared to normal speech (it changes slowly compared to other parts of the red tx signal).

In Figure 2 the lower brown line shows how well the FXO port hybrid is working. It normally varies between 6-15dB. However near the pop it first goes up to 60 then down to 0 dB. The low frequency pop signal is messing up the hybrid, making it non-linear. This means the echo canceller cannot cope, in fact it resets the coefficients. Echo cancellers depend on the hybrid working in a linear mode all the time.

So the solution is to high pass filter the tx signal the microphone sends to your FXO port. By removing the low frequency pop energy your the hybrid will remain linear, and the echo canceller will work with soft phones like kiax.

Are 128ms Tails Really Needed?

There is a school of thought that says a “128ms tail” is required for “serious” echo cancellation. I am not sure where that requirement comes from. I have collected many echo samples from all over the world and 9/10 would have worked with a 16ms tail. The 10th was a long distance T1 line, and even that fits comfortably in a 32ms tail.

If any PSTN FXO phone line has a 128ms echo then an analog phone connected to that line would be unusable. My understanding (and experience) is that Telcos insert network echo cancellers after a certain delay, for example on long distance calls. That’s why you can make regular long distance calls without echo.

Perhaps 128ms tails are required for operating inside of Telco networks or when Telcos handle international trunks. Anyway I suspect that the 128ms requirement is just another piece of FUD that surrounds echo cancellation, like “hardware echo cancellation is superior to software” or “you must have a DSP chip”. Perhaps “128ms tail” has become confused with “a working echo canceller algorithm”.

So my alpha testers and I typically use Oslec with a 16 or 32ms tail and it works just fine. BTW I would love to see a sample that refutes this argument. If anyone can send me a sample that shows a tail greater than 32ms for a PSTN FXO line I will happily publish it here and recant my heresy against the church of the 128ms tail!

Open Development Works!

In Part One I spoke about the idea of people collecting and sending samples of bad echo. This has really worked well. Several times during testing something went wrong at an alpha site, and collecting a sample really helped me work out why and improve Oslec. Thanks especially to Mark, Pawel, and Pavel plus many others for sending in samples.

I have also had a lot of useful comments from my DSP “brains trust” – Steve, Jean-Marc and Ramakrishnan.

This was truly an open development effort. Echo cancellers are tricky voodoo, requiring lots or practical tricks on top of the standard DSP algorithms. I have tried off and on for 15 years to come up with a viable echo canceller. The Zaptel echo cancellers have been works-in-progress for 6 years. Other companies have invested 10’s of man years (e.g. teams of 20 people for several years).

So I think this is a great example of where open development techniques have been used to achieve excellent results in a short time.

How to Test an Echo Canceller

Testing an echo canceller can be tricky. This section explains how to test an echo canceller, along with some of the traps.

Set up a SIP phone to FXS call. This way there is plenty of delay in the circuit and you will get a nice echo. An analog to analog call (say FXS to FXS) might be TDM bridged and not have any delay.

Once the call is running mute the analog phone. Most phones have a button for this – if they don’t then unplug the handset from the phone base. To test an echo canceller is is important to have no near end speech present. If the FXS phone is in a different room it’s OK to leave it un muted – just make sure it can’t pick up anything you are saying into the SIP Phone.

Speak loudly into the SIP phone and listen for any echos. It is fun to try this with the Oslec control panel:

For example try the “Disable” and “Enable” buttons and listen to the echo with and without the echo canceller.

Another good test is double talk. Get a person in a different room to use the FXS phone while you use the SIP phone. Get them to speak constantly and try to talk on top of them. Double talk is a good test as it can confuse echo cancellers.

If you are testing a SIP to FXO call, make sure the phone at the other end of the connection (say a cell or desktop phone) is out of audio range of the SIP phone, for example in another room. Alternatively, mute the telephone.

Conclusion

A good quality line echo canceller has been a missing part of the open source telephony scene for a long time. Through the efforts of a team of DSP engineers and several alpha testers we have developed a good candidate for a free (as in speech) line echo canceller. Please try Oslec yourself and tell us what you think.

Reading Further

Oslec Home Page
Part 1 – Introduction
Part 2 – How Echo Cancellers Work
Part 3 – Two Prototypes
Part 4 – First Phone Calls
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8 Port Low Cost FXS USB Channel Bank

Last week I attended a presentation at Adelaide University by a student named Tim Ansell. For his honors project Tim has developed an 8 channel FXS channel bank that connects to a host PC via USB, not unlike the Xorcom Astribank products.

The channel bank uses FXS interface chips and a PIC microcontroller. Signal processing such as echo cancellation and DTMF detection is performed by the Host PC. The advantage of this design is low cost.

Tim demonstrated telephones making calls to each other, using the the PIC to perform some simple switching. His next steps are to complete the interface to the Host PC and Tim also has many ideas for cost reduction.

Tim is considering commercialising his design – please email him directly for more information.

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Freest Phone call ever?

Li Yuqian (Beijing, China) and I (Adelaide, South Australia) just made the first IP04 to IP04 phone call. We used IAX2 and a GSM codec and it sounded just fine. On January 15 2007, Wojtek Tryc (Ottawa, Canada) and Dimitar Penev (Sofia, Bulgaria) from the BlackfinOne community made a phone call using a BlackfinOne and 4fx combination. Could these be the freest (as in speech) phone calls ever?

  1. Open source Asterisk software was used.
  2. The operating system was uClinux.
  3. The hardware designs are open and free for anyone to use.
  4. The hardware was designed using open source gEDA tools.
  5. We used VOIP so the call cost was approximately zero.
  6. Each IP04 cost us less than $200 to build, way cheaper than any other comparable IP-PBX.
  7. Both Li and I hand assembled (as in soldered) the IP04 hardware ourselves. This has nothing to do with the call being free. It’s just cool :-)

Hmm, maybe we should have used Speex. That would have been even freer than GSM!

So it occurred to me that Li, myself, and the BlackfinOne community may have been making the most open phone calls ever. Even the inventor of the telephone Alexander Graham Bell was very wrapped up in 19th century patent wars over his hardware!

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IP04 and the Asterisk Appliance

A few people have asked me to compare the IP04 and the Digium Asterisk Appliance (AA).

  1. The architecture is very similar, a Blackfin connected to Silicon Labs line interface chips. For the record, both were developed by independent teams. BTW the hardware design is not rocket science – just plugging chips together. Most of the work is done by the uClinux and Asterisk software.
  2. The IP04 hardware design is open (free as in speech). Anyone is welcome to manufacture, sell, modify, improve. It has been developed by a community, for community reasons. The AA hardware design is closed.
  3. You are welcome to use the IP04 for non-Asterisk applications, for example Freeswitch, Yate, SER, Bayonne, Callweaver. It could even be used as a substitute for a PCI line interface card, e.g. a Ethernet channel bank.
  4. The IP04 uses Oslec software echo cancellation, the AA an Octasic hardware chip. The AA echo cancellation hardware adds $50 approx to the BOM (which translates to $150-$200 more on the street price) and is, well, closed. However it arguably has higher performance (at least today), and off loads cycles from the Blackfin. However we have plenty of spare cycles (like 90%) so why not do the echo cancellation in software for zero cost?
  5. The IP04 uses the BF532 rather than BF537. The BF537 is faster, has more on board RAM, and a built-in MAC. The BF532 is cheaper and can be hand loaded (important for a hackable design). This isn’t a significant difference in low density analog systems, as the CPU load is small.
  6. The Asterisk Appliance has WAN and LAN Ethernet ports (with a 4 port VLAN), the IP04 a single Ethernet port.
  7. There are some technical differences, for example the IP04 uses single port rather than 4 port modules, 256M on-board flash compared to 8M on the AA, the AA has a CF slot, the IP04 a MMC slot. The IP04 can be expanded to 8/12/etc ports, so no big differences in density.
  8. Both designs are beta at this stage, with no production hardware in general use. The current development hardware for the AA has a minimum retail of $2195.00. A Free telephony Project kit costs around $530 (starter kit STAMP motherboard). The suggested retail (AFAIK) for the AA will be $1000, the IP04 $400 (and falling).

Stop Press

I have just discovered a new entry to the Embedded Asterisk “Appliance” space, the TechnoCo Vdex 40. This Australian product has 4 FXO ports, uses a multiple ARM/DSP processor architecture and is sampling for US$695, with street price still TBD. Nice product guys – well done.

Stop Stop Press

Another Blackfin based Asterisk Appliance/IP04 type product has appeared, the Magiclink Asterisk Appliance. This looks similar in design to the AA and IP04, however has USB and CF ports. Quantity 100 pricing for 4 FXO ports is a low $299, which is great news. Good work Magiclink.

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Building an Embedded Asterisk PBX Part 3

The IP04 is a Four Port Embedded IP PBX that runs Asterisk. The hardware design is 100% open. I just built the first IP04 prototype (really built, as in soldered), and would like to tell you about it.

This post talks about the IP04 hardware, the bring up, an explosion (!).

Hot Solder

You know surface mount soldering is fun. Really fun. It’s a nice break from the thinking-oriented work I normally do, like DSP, programming, and fighting zillion level deep makefiles that are needed for embedded systems. There is just something about making stuff with your hands. It even looks nice at the end, you can hold it and show it off to your wife and kids. Of course they don’t actually care but you can still show them!

After building a BlackfinOne, I found the IP04 quite easy to put together. I would recommend it to anyone who wants a first surface mount or embedded Linux hardware project. It’s kind of amazing, but with a days work you can build (as in solder) your very own embedded Linux system.

Flux, a stereo microscope, and a good quality PCB really help make surface mount soldering a pleasure. Tip: I check each pin of the chips after soldering by attempting to wiggle it with a sewing needle.

So I had a very enjoyable day soldering the IP04 prototype under the stereo microscope. After loading the surface mount components I gave the board a “bath” to remove the flux residue. I actually put the PCB in a bowl of hot water and used a small brush to scrub that nasty conductive flux off (conductive flux residue caused me a lot of problems when building a BlackfinOne). After washing I soaked up excess water with paper towels then put it under a hot lamp to dry quickly.

Open Hardware Hacking

Curiously, hardware hacking is getting cheaper and easier. For example the tools for surface mount work are reasonably cheap (a soldering iron and stereo microscope), there is plenty of free CAD software, low cost PCB fabrication, and web based components stores like Digikey.

With the growth of open hardware projects, they are plenty of cool designs and people on line who can help you if you get stuck.

How the IP04 Works

Here is a block diagram of the IP04 hardware architecture:

You may also like to take a look at the IP04 schematic.

When power is applied, the Blackfin boot ROM starts reading from the little 256k SPI flash chip. The program it loads is called u-boot, a powerful boot loader that has been ported to the Blackfin by the Analog Devices Blackfin team. U-boot has a command line interface that lets you load other programs from flash or via Ethernet. In normal operation it automatically loads and executes the uClinux kernel.

NAND flash is used as the main storage for the IP04. NAND flash has the advantage of high density and low cost. It’s the same stuff that is used in your MP3 player, so prices have plummeted over recent years. However the Blackfin boot ROM can’t read the NAND flash directly, which is why we need the SPI flash chip and U-boot to support the start up process. Compared to many embedded linux systems, the IP04 requires a lot of flash storage (around 16M minimum) to store the Asterisk executable and audio prompts.

When the kernel boots it runs out of SDRAM, and the NAND flash is mapped to the root filesystem. We also use a portion of the SDRAM for temporary files, e.g. /tmp.

If you would like to learn more about IP-PBX design see the Resources section of the Free Telephony Project website.

An Explosion!

So it was time for the moment of truth. After a run of successful hardware projects I was feeling pretty confident, which of course angered the Gods of open hardware. I applied 12V and started poking about with my multimeter. About 3 seconds later – BANG!. A small mushroom cloud rises a few inches off the board and gently drifts across the bench. A nasty smell fills the air, along with a string of expletives that bring the family running.

“Dad, can you do it again?”, my 8 year old son asks! He was ejected from my office shortly afterwards.

I sniffed a few areas of the board to track down the general problem area. A peek through the microscope showed a capacitor had blown it’s guts out, the white fuzzy stuff on the left of this picture:

The problem was two capacitors had their labels swapped on the PCB silkscreen. This meant I had loaded a capacitor with a 6V rating where there should have been a 25V rated capacitor. When 12V was applied – the 6V rated capacitor expressed it’s displeasure!

Apart from that the remaining assembly and bring up went pretty smoothly. One mistake I made was forgetting to supply power to the Real Time Clock (RTC). This caused U-boot to stall when it started, waiting for the RTC clock to come up. Of course, when this bug appeared I had no idea if it was a hardware or software problem. So I had to hunt through various possibilities in “bug space”, for example sprinkling printfs through the U-boot code to find out where it was stalling. Unfortunately, each new load of software took 20 minutes to flash via the Igloo JTAG cable, so it was a slow process that took 2 minutes to fix once I found it.

I modified the u-boot and uClinux configuration a little from the BlackfinOne baseline due to minor differences between the two boards; for example the smaller SPI flash, one Ethernet port, and the use of NAND flash. This was fun – I learnt a lot about U-boot and the set up of NAND flash through the MTD driver. By this time I had u-boot running so I could download new images via Ethernet and test in a few seconds.

I was re-using tested building blocks from the BlackfinOne and 4fx designs so it all went smoothly. One week from initial power up uClinux was booting and Asterisk running with 4 analog ports. Rather than stressing over the little bugs and trying to race though I took my time and enjoyed the bring up process.

Finally, I lifted the handset on a telephone connected to the IP04 and there was the dial tone! Nice.

Automated Asterisk Load Testing

The Asterisk 1.4 GUI works although it isn’t stable at present on the IP04. Sometimes the GUI freezes and I can see some core dumps on the IP04 console. This could be a Blackfin specific issue, for example uClinux is more fussy about stack space than regular MMU-enabled Linux. Some more work required to sort this one out. In the mean time, vi and Asterisk conf files are OK with me!

I was keen to see how stable the new hardware was, so I used some scripts to load the PBX over a 12 hour period. Here is a block diagram of the test set up:

A simple shell script on the x86 Asterisk box:
#!/bin/sh
# lotsofcalls.sh
# David Rowe 3 April 2007

calls=0
rm -f /tmp/lotsofcalls.txt
touch /tmp/lotsofcalls.txt
rm -f /var/spool/asterisk/outgoing/callastfin.call
while [ 1 ]
do
cp callastfin.call /var/spool/asterisk/outgoing
sleep 60
calls=`expr 1 $calls`
echo $calls >> /tmp/lotsofcalls.txt
done

kicks off an outgoing IAX2/GSM call to the IP04 once every minute. The call makes FXS Port 4 ring, which is connected (via a phone cable) to FXO port 2. After a few rings FXO Port 2 answers and plays an IVR script for a few seconds, then hangs up. The analog phone connected to the x86 Asterisk box rings when the IP04 call connects. As long as this phone rings every minute I know the test is still running OK. I can also lift the phone when it rings, for example to make sure the audio quality is OK.

In practice I use a script to place two calls at the same time, so the total load is two IAX/GSM calls and 4 analog calls. I let this run for about 12 hours and the IP04 worked fine – 4000 calls were placed and the loadav was about 0.2 (10% of the Blackfins CPU). Much of the code is still unoptimised so this suggests we can go to much higher call loads in the future.

Anyway given that I was testing on hardware where the solder has barely cooled I was pretty happy.

Whats Next

There is still plenty to do, for example we have quite a few Astfin tickets that need working on. If anyone would like to help out please contact me or the Astfin team.

I am working with a manufacturer to put these designs into volume commercial production. The first batch of fully assembled production units will be available in mid 2007 for around $450:

In the mean time – if your feel like a cool project – you are welcome to build an IP04 yourself! Here is some more information on obtaining bare IP04 PCBs and FXS/FXO modules.

Update – Fully Assembled and Tested IP04s now Available

July 23, 2007: You can now buy your own IP04 from the Free Telephony Project on-line store. The store also stocks parts if you would like to assemble (as in solder) your own IP04. I have blogged on the Production IP04 in Part 4 of this series.

Credits

I stand on the shoulders of giants. I have tried to add just a little bit to their work. Thanks to the Astfin & BlackfinOne teams, uClinux, Analog Devices Blackfin team, and the Asterisk community. Thanks to Mike Taht for being my editor-in-chief for this post. Sorry if I forgot anybody.

Links

IP04 home page
Buy an IP04 from the Free Telephony Project on-line store
IP04 Schematic, PCB, CPLD code, Errata, and more
Building an Embedded Asterisk PBX Part 1
Building an Embedded Asterisk PBX Part 2
Building an Embedded Asterisk PBX Part 4
Building a BlackfinOne
How to make your Blackfin fly Part 1
Open Source Echo Canceller Part 1
IP04 and the Asterisk Appliance

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A $10 ATA

In October 2006 I made my way to Dharamsala, northern India, where I visited the Tibetan Technology Center, and in particular a guy named Yahel Ben-David.

You see I am interested in developing low cost open hardware technology that can help people in the developing world. Yahel and the team at Tibtec are using commodity routers to build low cost community wireless networks. To date about 3000 computers have been connected to the Internet by the Tibtec team. As these computers are often shared it is fair to say that about 30,000 people now have Internet access thanks to the Tibtec team.

Now I have been working on some open hardware/software for building low cost embedded IP-PBXes. I had an idea that my work might be helpful to Yahel and the people at Tibtec.

As we got to talking, a few interesting economic points came up. Yahel can buy a WRT54G type router for $50 and an ATA for about the same price, due to the miracle of mass production. In small quantities, my open hardware designs couldn’t get close to this, even by removing all margins and selling them at cost. Also, for many applications, just one or two FXS ports are required, rather than a full blown PBX for 4-8 analog ports.

(Note: I have since reworked the IP-PBX design so that it can be built for less that $100 in quantity, however that is another story for another blog post).

So after leaving India, in the back of my mind was the need for a very low cost way to connect a telephone to a router.

A few months passed.

Recently, I became aware of Air-Stream – a community wireless network that extends over my home city, Adelaide, South Australia. Air-stream uses very similar technology to Tibtec – low cost commodity routers, high gain antennas, and hacking. It occurred to me that a “killer application” for Air-stream would be a way to carry phone calls for free over the Adelaide metropolitan area (in Australia we pay 25 cents for each local call).

However once again, if Airstream users can connect with a $50 commodity router, it would be nice to find a low cost way to hook up a telephone.

AVR Microcontrollers and DSP

At about the same time I came across a few articles that got me thinking. One was USBtiny – a way to implement USB in software on a low cost Atmel AVR ATtiny microcontroller. In this design the little $1.50 micro gets interrupted by each USB bit at a rate of up to 10MHz! And I thought the Zaptel 1ms interrupts were bad. For certain applications this allows very low cost USB interfaces to be built, cheaper than typical custom USB interface chips. Hmmmmmmm.

I then stumbled across a fantastic Circuit Cellar article by Marco Carnut on an AVR Phone Recorder and Telephony Platform. This project uses a $5 Atmel AVR ATMega microcontroller. As well as recording telephone signals and communicating with a host PC, the AVR also finds time for some real time DSP (DTMF decoding). What was news to me was that these little chips have some DSP capability built in – for example a relatively fast 2 cycle multiply. These AVR chips also have a bunch of other features, such as built in flash, RAM and A/D D/A converters that seem to work OK for speech signals. They are essentially little “systems on a chip” – just add crystal and stir (well, program). Hmmmmmmm (again).

So the big question is, can we use these chips to build a $10 ATA? Well, I think this might just be possible. To see why, lets first take a look at the design of a typical ATA.

ATA Design 101

The figure below shows the design of a typical ATA. Quite a lot going on. Typically the software components are implemented on some sort of fairly fast (200MHz, several MB of RAM and Flash) microcontroller that can run 1 or two channels of G729 and also support the SIP stack and perhaps a basic operating system.

The Analog FXS Interface is implemented with a chip set from companies like Silicon Labs. This chip set generates DC “battery” voltage to run the phone (e.g. 48VDC), 90Vrms ring signal, provides AC analog termination (e.g. 600 ohms impedance) and a hybrid – a gadget that separates and combines the transmit and receive voltages on the two phone wires. I have written an introduction to hybrids in an earlier post on echo cancellers.

Here is an equivalent electrical model of the Analog FXS Interface connected to a phone (click on the image for a larger version):

There are two paths – DC and AC. The DC path flows through Vbatt to Rdc and provides current to run the phone. Cblock prevents DC entering the AC path, and Ldc prevents and AC entering the DC path. This isolation allows the paths to have different impedances, for example a 200 ohm DC feed resistance Vbatt and a 600 ohm AC impedance (Zo an Zl) for audio signals.

The AC path flows from Vo through Zo and Zl (the audio signal the ATA send to the phone). In the other direction the audio from the phone is the AC path flowing from Vl through Zl and Zo. Zl and Zo are typically the “600 ohms” impedance you hear about when people talk about phone lines.

To ring the phone we switch in a low frequency (say 20Hz), high voltage ring signal Vring. When the phone answers, it closes the hook switch, which is detected by the Hook Detector.

The hybrid (not illustrated) separates Vo from Vl. It usually doesn’t get it quite right, which is where the echo canceller comes in to remove any transmit echo (residual Vo) from the received signal.

In a real world design, the actual parts Cblock, Ldc etc don’t really exist, these days electrical equivalents are all built into the chip set. For example Ldc is often implemented with transistors and a capacitor in a Gyrator circuit, as that is cheaper than using a large inductor. However this electrical model is still pretty accurate, and represents an equivalent circuit that is useful for analysis.

$10 ATA Design

So here is the proposed design of the $10 ATA:

The key points in the design are:

  1. Use a low cost ($3 in modest volume) AVR microcontroller to interface between the phone and the USB port of the router. Alternatively we can use RS232 which most routers support with slight modifications. Ethernet is also possible but costs more as we need an Ethernet chip. With RS232 it may even be possible to remove the RS232 line drivers (saving additional cost) if the line is short. Or perhaps use low cost analog circuit for the line driver alternative (given we have 12V available).
  2. Use the AVRs DSP capability to do DTMF detection.
  3. The built in RS232 UART can run at 115 kbit/s. We require approximately 64 kbit/s in either direction, so RS232 should be acceptable, even with the overhead for start and stop bits. A small amount of overhead is also required for signalling (hook status, DTMF), however this is just a few bytes per second.
  4. The AVR can also be used to implement the switch-mode power supply needed to generate a ring voltage in software (DC-DC converter). If this is not possible, we can connect a buzzer/beeper to the AVR. Instead of the phone ringing, we beep the (nearby) ATA. Usually ATAs are located close to the phone.
  5. We use the AVRs built in A/D and D/A to convert the analog signal.
  6. Use a DC “battery” voltage of 12VDC rather than 48VDC to run the phone – this is enough if the cable is only a few meters, phone only require about 6V, the 48VDC is there to overcome resistive losses on long cables.
  7. The router runs Asterisk (common on WRT54G-class routers). Asterisk talks to the ATA via USB/RS232 using a simple channel driver, for example something similar to chan_oss. The ATA is really not much more than a sound blaster – we push most of the processing to the router, which has a few more spare MIPS.
  8. Handle echo cancellation using echo training and fixed coefficients for the duration of the call. This is a low-MIPS approach that we can get away with due to the special nature of FXS lines. More on this below.
  9. Use a very simple hybrid (just an op-amp), and let the echo canceller do most of the work in separating the transmit and receive signals. We essentially move the hybrid from hardware into software, where it is free to implement.

Echo Cancellation

An FXS port is a special, rather well behaved case which fortunately is kind to echo cancellers. Cable runs are generally short (a few meters of cable) and the impedance match quite close to the ideal. This means only a short tail is required, perhaps only 8ms (64 taps).

Some other simplifications are possible. The echo path is unlikely to change during a call, so we can fix the echo canceller taps for the duration of the call. This removes about two thirds of the MIPS which are normally required to support continuous adaption.

Assuming fixed coefficients and a 64 tap FIR filter, the number of operations is 64 taps x 8000 samples/second x 5 ops/filter tap = 2.56 MIPS. This is acceptable on a 10-20 MIPS AVR. A specialised DSP chip would require just 1 operation per filter tap, however I am estimating 5 operations/filter tap for the AVR.

I have tested the fixed coefficient technique on FXS ports in the past and it works quite well when teamed with a simple echo suppressor to remove the small amount of residual echo. The filter taps can be calculated when the phone is taken off hook by sending an impulse down the line. This is the same algorithm as used by the Zaptel echo canceller when in “echotrain” mode.

Risks

There are several risks with the proposed $10 ATA design. Here is my current risk list:

  1. Speech quality through AVR A/D and D/A. What sort of anti-aliasing filters and reconstruction filter should we use (if any)? Should we over sample to reduce analog filtering requirements and possibly increase effective resolution e.g. via noise shaping in DSP? Will the A/D and D/A resolution deliver reasonable speech quality? Will we require some AGC to cope with the limited dynamic range of The A/D and D/A? Do we use companded (mulaw) over the RS232/USB link or linear?
  2. Will we run out of MIPS on the AVR or router?
  3. The AVR based DC-DC converter for ring generation. I am not familiar with DC-DC converters, however the plan is to use a similar topology to the Silicon Labs 3210, i.e. use the AVR to generate PWM that drives a switching transistor, with several safety cut outs. An alternative is to use a simple beeper, with tones generated by the AVR. This would be cheaper and faster to develop, but would only work when the ATA was close to the telephone.

An RS232 Phone

In many parts of the world analog phones are very cheap, for example in Vietnam they are about $2. This is one reason why a low cost ATA makes so much sense compared to even the cheapest SIP phone.

However there is another approach. We could use a $2 phone case, keypad and handset and put our own electronics inside. Sort of make our own “IP phone”. However it talks RS232 rather than SIP. The advantage of this approach is that we avoid most of the hassle in an ATA, i.e. dealing with the FXS interface (ring voltages, echo, 2 to four wire conversion). The microcontroller could be simpler, too.

So I thought I would mention the option of modifying a regular analog phone. It might just be cheaper and certainly less development effort. Perhaps both the $10 ATA and RS232 phone could be developed in parallel, as they share many subsystems.

Development Plan

I suggest that a staged approach to implementation be performed. We should attack the risky areas first to prove the feasibility. Here are the milestones:

  1. Milestone 1: Implement a RS232 sound blaster. Use the AVR A/D to sample speech from a phone handset, and play back speech to the handset. Connect to the router via RS232. Modify chan_oss to allow speech I/O from the RS232 port. Do not implement DTMF, echo can, or ringing power supply just yet. Control from the Asterisk CLI. The idea of this milestone is to confirm that the AVR can handle speech traffic via RS232 and that it sounds OK when teamed with Asterisk.
  2. Milestone 2: Add DTMF and echo cancellation, and implement the analog hybrid. Use a beeper for ringing, no DC-DC converter just yet. At this point we have a design that can be used in a $10 ATA of a RS232 phone.
  3. Milestone 3: Develop the ringing DC-DC converter and integrate.

Interested in Working on a $10 ATA?

I would really appreciate some help with this project, as I am kinda busy with a bunch of other stuff. People with experience or just plain interested in OpenWRT, Asterisk, channel drivers, AVR, and analog hardware development would be very welcome. In the mean time I will work on it on a part time basis.

The cool thing about this project is that the cost of entry is very low (by definition) and the hardware can be developed using plug-in bread board (no soldering required). This work also has the potential to help millions of people in the developing world get a telephone, so it is a very worthwhile project.

Please join our low cost ATA mailing list or contact David Rowe.

Ideas for Further Work

This work could be extended to multiple FXS ports with a more powerful DSP. For example if this design works, then a a $14 (Quantity 1 price) BF531 DSP chip could be used rather than a AVR. The Blackfin can run programs from internal memory requiring only a $1 SPI flash chip to boot. This DSP could handle multiple channels and possibly implement GSM or G729 compression as well. Perhaps a 8 channel FXS channel bank can be built this way for $30. This could serve a remote village, connected via the router using wireless Internet.

The $10 price point is for low volume. Imagine the possibilities given volume production. There are billions of people who need a telephone, and they have some of the cheapest labour on the planet. The circuit is simple and can be assembled by just about anyone. With a market this size, custom silicon is a possibility, which would allow us to further integrate functions into the chip.

So the possibilities for price reduction are endless. Ultimately the electronics is just sand, a little labour, and an open design.

Links

$10 ATA Part 2

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Open Source Echo Canceller Part 4 – First Phone Calls

I fired up the echo canceller in real time today, and tried a few calls on my home phone line. I used an Asterisk 1.2 system running a Digium TDM400 card, and integrated the new echo canceller into Zaptel. I had previously tried this same phone line with one of the Zaptel 1.2 built-in echo cancellers with poor results – it didn’t really converge. To be fair, I haven’t tried the latest Zaptel 1.4 echo cancellers, I will try that soon.

The new echo can worked OK, definitely an improvement. I could hear a little echo on about 3 occasions in about 10 minutes of talking, but it quickly reconverged each time.

There were a few little problems – the crude Non-Linear Processor (NLP) used simply mutes the near end and I can hear the background noise being switched on and off when I talk. I really need a better approach like comfort noise or variable gain here (thanks Jean-Marc Valin for your suggestions here). Plus from the simulation I am aware of a few other weaknesses, e.g. some G168 test fails that need looking into.

Obviously, the echo canceller also needs much wider testing, so this is just a very preliminary result.

Anyway, I am pretty happy with this. One big reason for this work was so I could use my Embedded Asterisk system on this FXO line, and I am now pretty close – just need to port to the Blackfin.

The echo canceller code and a short README that describes how to use it on your Asterisk system is checked into SVN if anyone would like to try it.

Please send me an email and tell me how well it works for you. If it doesn’t work please use the sampling system to send me a few samples from your phone line. I can use that information to improve the echo canceller.

Overall this is an encouraging start. Thanks to all those who have helped me over the past month.

Reading Further

Oslec Home Page
Part 1 – Introduction
Part 2 – How Echo Cancellers Work
Part 3 – Two Prototypes
Part 4 – First Calls
Part 5 – Ready for Beta Testing
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Open Souce Echo Canceller Part 3 – Two Prototypes

Recently I have been experimenting with two prototype echo canceller algorithms. This post describes the prototypes and results so far. This post is pretty hard core DSP – it may not be of interest unless you already have a fair idea of how echo cancellers work. I am writing it mainly to help me clear my own head on progress so far. Part 1 and Part 2 of this series provide a gentler introduction.

If anyone wants further explanation please feel free to post a question or email me directly. The code is available via SVN.

The G168 Standard

After writing Part 1 of this series Steve Underwood suggested that a good approach would be to base the echo canceller development on the G168 standard.

This was an excellent suggestion – thanks Steve. Steve also pointed me at a prototype echo canceller and code he has developed to test the echo canceller against the G168 requirements, part of his very impressive spandsp DSP library. So I have been working with Steve’s software, adding to the echo canceller code and automating some of the tests.

I have been using a simulation of the echo canceller rather than a real time implementation. This means that rather than talking into a telephone saying “1..2..3..” and listening for good/bad echo I am running a command line program that simulates the effect of the telephone hardware to generate and measure the echo. This makes it much easier to experiment – for example I can dump internal states of the code at any time and generates objective results with automated pass/fail results. Once I am happy with the non-real time simulation the idea is to run the same code in real time.

Here is a sample run of the simulation code:
Performing test 2A(a) - Convergence with NLP enabled
test model ERL time Max Rin Max Sin Max Sout Result
2aa 1 -10.0 11.20s -14.98 -24.55 -100.00 PASS

This means that for G168 test 2A part (a) with echo model 1 and an Echo Return Loss (ERL) of 10dB we passed. The Rin (Receive In), Sin (Send In), Sout (Send Out) ports are the signal levels on various ports of the echo canceller in dBm0. Sout = -100 dBm0 basically means the echo is at a very low level by the end of this test. Wish that were true for all tests :-)

And here is a plot that shows what is going on:


Click on the image for a larger version. The echo is the blue signal. In less than 1 second (8000 samples) the echo is effectively removed.

G168 has about 20 basic tests that are repeated with a bunch of different permutations. It specifies the types of signals used to test the echo canceller and the expected results. The standard is available for free download (I use the 2004 version). Steve had already implemented much of the test code – this has been very helpful. I have been concentrating on automating the tests and trying to get the prototype echo cancellers to pass.

The two prototypes vary in how they control adaption. One uses an innovation on the Geigel Double Talk Detection (DTD) algorithm suggested to me by Steve called Tap Rotation, the other a Dual Path method from an early paper by Ochiai which was kindly pointed out to me by Ramakrishnan Muthukrishnan.

Geigel & Tap Rotation

The Geigel part of straight out of the classic Messerschmitt paper from Texas Instruments. The tap rotation algorithm works like this:

  • Instead of having one set of N filter taps we have three sets of N filter taps.
  • Every 1600 samples (200ms), we rotate to the next bank of taps, for example if we are using set 2, we start using set 3. This gives us a record of the previous state of the filter taps, for example if we are using set 3 then set 1 will be the oldest set.
  • If we detect double-talk (using the Geigel algorithm), we replace the current set of taps with the oldest set.

This algorithm protects us from failures of the Geigel DTD. For example it may take the Geigel DTD a few 10s of ms to detect double talk. In this time it is possible for the taps to diverge significantly. Tap rotation effectively tosses out the latest taps and replaces them with an older version, well before the DT started. This is like giving us 200-400ms of “pre-hangover” – we prevent adaption 200-400ms before DT. Combined with the hangover of the Geigel algorithm, it means we prevent adaption anywhere near the DT in both the positive and negative time directions.

Here is a plot of the algorithm in action (click for a larger version):

In the initial 5 second period the echo canceller is allowed to converge, then it gets blasted by high level near end speech for 5 seconds. Then there is a final 5 second segment where we look to see if the echo canceller has diverged. In this case it is doing a good job, you can see the echo level in the final 5 second section is similar to the first 5 second section.

The small green line at the bottom is the Double Talk Detector (DTD). You can see that it fires in the DT areas. On each “rising edge” of this signal the taps are reset to previous values.

As I have currently implemented it (and I freely admit I may have messed up somewhere), the Geigel/Tap Rotation Algorthim has a few problem areas:

  1. At low ERLs (e.g 6-8 dB) the DTD fires a lot, even when there isn’t double talk, as the high echo levels mimic near end speech. So we don’t converge fast enough in the 1s allowed for the convergence test.
  2. It struggles with near-end background noise (G168 Test 2c). The noise gets mistaken for near-end speech, and the taps get reset back to previous values all the time by the tap rotation logic. So it adapts very slowly and can’t converge within 1s.
  3. It also diverges a bit too much with low levels of near end speech (e.g. Test 3b part (b)) during double talk. It’s OK for double talk with high near end speech levels, such as the plot above (Test 3B part (a)).

Dual Path Algorithm

The second prototype has two filters to model the echo, a foreground and background filter. The background filter adapts continuously with only mininimal protection from double talk. When the background filter is performing better than the foreground, it’s taps are copied to the foreground filter. See the Ochiai paper for more information.

This algorithm passes the cases described above where the Giegel/Tap Rotation Algorithm is struggling. However it still fails several boundary cases like very low ERL & levels, but these fails are close calls (for example slightly slower convergence time than required) rather than complete failures of the algorithm.

For more information see the echo.c source code.

Automated Testing

I have automated pass/fail evaluation of a 5 test subset of Steve’s G168 test code, here is a sample output:
test ERL Max Rin Max Sin Max Sgen Max Sout Result
2aa -10 -14.98 -24.55 -100.00 -100.00 PASS
2ca -10 -14.98 -24.55 -30.01 -31.97 PASS
3a -10 -14.98 -24.55 -29.87 -51.32 PASS
3ba -10 -14.98 -24.55 -14.86 -53.44 PASS
3bb -10 -14.98 -24.55 -20.86 -53.46 PASS

Key:

2a (a) Basic convergence test
2c (a) Convergence test with near end noise
3a Convergence test with low levels of near end speech
3b (a) Double talk divergence with high levels of near end speech
3b (b) Double talk divergence with low levels of near end speech

Rin (receive in) Sin (Send in) etc are the nomenclature used in G168. Sgen (Send generator) is the near end speech/noise signal. I have used some different names for the same signals in earlier posts, these two figures explain:

So in Test 2c (a) the maximum near end (Sgen) signal (which is noise in this case) was -30 dBm0. The maximum echo signal (Sin) was -24.55dBm0 when the system was driven by a -14.98dBm0 (Rin) signal. If you look at the difference between Sin & Rin the ERL is actually more like 9.57dB.

Many of the G168 tests are very similar, so I have built up a bunch of C code functions as a sort of “test language” to make life a bit easier:
print_title("Performing test 2A(a)\n");
reset_all();
echo_can_adaption_mode(ctx,
ECHO_CAN_USE_ADAPTION |
ECHO_CAN_USE_NLP);

/* initial zero input as reqd by G168 */

mute_Rin();
run_test(200, MSEC);
unmute_Rin();

/* Now test convergence */

run_test(1, SEC);
reset_meter_peaks();
install_test_callback(test_2a);
run_test(10, SEC);

print_results();

The Octave script echo_dump.m is used to plot internal states of the echo canceller – this is really helpful in letting me drill down to the problems in the algorithm.

Testing on Real World Signals

The G168 tests are conducted with synthetic speech signals. As a sanity check I have run the two prototypes with echo signals sampled from a real phone line:

The canceller takes a little longer to converge in this case, as the speech segments “1..2..3..4” are short followed by long-ish pauses. However you can see that the echo (blue line) is removed.

You can even listen to the output. This is the echo signal before cancellation, this is the signal after cancellation using the Dual Path algorithm. You can hear the echo signal gradually decreasing as the canceller converges. It would be nice to speed up convergence – an ideal echo canceller would cancel almost immediately and the “after cancellation” file would just contain silence.

Next Steps and Help Wanted

I am enouraged by the progress so far, however there is still plenty to do:

  1. Test in real time on x86 and Blackfin. This is the reason for all this work in the first place. All I really want is to connect my shiny new embedded IP-PBX up to a FXO line without echo!
  2. Lots more G168 tests to implement and automate.
  3. Chase down current fail cases.
  4. Convert some float code to fixed point.Done
  5. Convert NLP to use comfort noise rather than muting.
  6. Make the canceller and sampling software hardware-agnostic. For Asterisk it should really integrate with Zaptel rather than the hardware driver.
  7. Implement algorithms to provide robustness (non divergence) with tones. I am not sure if this feature is strictly needed for my application (FXO port for an IP-PBX) but robustness for narrow band signals is required for G168 compliance.
  8. It would be interesting to run some other open source echo canceller algorithms through the G168 test framework. For example there are several echo cancellers in Zaptel, and Jean-Marc Valin’s acoustic echo canceller used in Speex.

Anyway if you are interested in working on an open source echo canceller you are very welcome to help out. Just send me an email. A lot of this work doesn’t require specialised DSP skills (for example integration and testing in real time on an x86 Asterisk system), so there is something here for everyone. Due to the automated tests, this project would also make a great project for learning DSP and echo cancellation – if you make an error the tests will let you know.

The core echo canceller development is tough and challenging work! As I suspected :-) So after hammering away for the last few weeks I felt a bit stale and took a few days off to go camping with my kids. We went to the Murray River National Park, about 180km from were I live in Adelaide, South Australia. I now feel a little more balanced, amazing what a few days off can do!

As a next step I might do some real time testing, just to make sure I haven’t missed anything obvious with the G168 tests. My first milestone is a “workable” echo can for my home phone (FXO) line, I should be getting close now I think :-)

Credits

Thanks to Steve Underwood for all the excellent spandsp code he has written, and to Steve, Jean-Marc Valin, and Ramakrishnan Muthukrishnan for their comments and help with this work.

Reading Further

The Open Source Line Echo Canceller (Oslec) has progressed a great deal since this initial (Part 1) post was written:

Oslec Home Page
Part 1 – Introduction
Part 2 – How Echo Cancellers Work
Part 3 – Two Prototypes
Part 4 – First Calls
Part 5 – Ready for Beta Testing
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Open Source Echo Canceller Part 2 – How Echo Cancellers Work

This post explains the basics of how echo cancellers using a very simple C code example.

From Part One of this series here is a block diagram of an echo canceller:

Lets convert this diagram to a model of the echo and echo canceller, and put some sample numbers into the system:

In this case we model the echo as a simple multiplication of the tx signal. So any signal we send down the tx port will be reflected back to us as an echo signal that is 0.1 times the size of the tx signal. The idea of the echo canceller is to work out the value of the echo (which it stores in the variable h). If we estimate h correctly, then our model of the echo (tx times h) will exactly cancel the echo signal.

Echo cancellers adapt to the particular characteristics of the echo in your telephone line. Each phone line is different so the actual amount of echo (in this case 0.1) is unknown. The echo canceller must learn this value somehow, by looking at what goes in (tx) and what comes out (rx) of the hybrid. Many echo cancellers use an adaptive filter to “learn” the echo characteristics.

Here is some C code that shows how it all works:
/* echo.c simple echo canceller demo */

#include <stdio.h>

#define ECHO 0.1
#define N 10
#define BETA 0.3

int main() {
float tx, rx, ec, h;
int i;

tx = 1.0;
h = 0.0;

printf("Step tx rx ec h\n");
for(i=0; i<N; i++) {
rx = ECHO*tx;
ec = rx - h*tx;
h += BETA*ec;
printf("[%d] %3.2f %3.2f %3.2f %3.2f\n",
i, tx, rx, ec, h);
}

return 0;
}

Here is the output from a sample run:
Step tx rx ec h
[0] 1.00 0.10 0.10 0.03
[1] 1.00 0.10 0.07 0.05
[2] 1.00 0.10 0.05 0.07
[3] 1.00 0.10 0.03 0.08
[4] 1.00 0.10 0.02 0.08
[5] 1.00 0.10 0.02 0.09
[6] 1.00 0.10 0.01 0.09
[7] 1.00 0.10 0.01 0.09
[8] 1.00 0.10 0.01 0.10
[9] 1.00 0.10 0.00 0.10

To work out the echo (h) we use a simple adaption algorithm. First we use our current guess of the echo (h) to calculate an estimate of the echo (ec). Of course if we don’t have an accurate estimate of h we won’t predict the echo exactly, we will have an error. To converge on the correct value of h we add a little bit of that error onto h and try again. As we get closer and closer the error gets smaller and eventually we converge on the correct answer (h = 0.1).

In practice the echo is a little more complex than a simple constant multiplier. It is usually modelled as a bunch of constants delayed by one sample from each other, for example:
echo_estimate = 0;
for(i=0; i<N; i++)
echo_estimate += h[i] * tx[j-i];
ec[j] = rx[j] - echo_estimate;

The number of samples in the echo model (N in this case) specifies the maximum delay or “tail” the echo canceller can handle. So when an echo canceller is specified as say a 128 ms tail, this means 128 ms * 8 samples/ms = 1024 samples in the echo model. The 8 samples/ms comes from the fact that telephone signals are sampled at 8000 Hz.

The array of h values are sometimes called the echo coefficients or taps. Here is what a typical array of h values looks like when plotted:

This has a rather short tail of only 64 samples (8ms), which would be typical of a FXS port where the phone is connected to the port by a few metres of cable.

In real world echo cancellation we also need to deal with problems like freezing the adaption when both people are talking at once (double talk). In this case the ec signal is made up of the echo plus the “near end” talker’s speech rather than just the echo by itself.

Reading Further

The Open Source Line Echo Canceller (Oslec) has progressed a great deal since this post was written:

Oslec Home Page
Part 1 – Introduction
Part 2 – How Echo Cancellers Work
Part 3 – Two Prototypes
Part 4 – First Calls
Part 5 – Ready for Beta Testing

EMI Testing 101

Introduction

Electromagnetic Interference (EMI) testing measures the amount of energy your electronic product radiates. If it radiates too much EMI, it might interfere with other products, for example a PC with bad EMI might make it hard to use your radio or cell phone.

EMI is a growing problem, as most devices contains some sort of computer, and the frequencies of clock signals are rising all the time. All those fast signals can potentially create lots of EMI.

EMI tests can be a stressful time in the product development cycle. These tests are usually occur right at the end, when the budget is blown, you are overdue and you need to get that product out the door “or else”. They are expensive (especially for small companies) and are “make or break” – a failure could send you back to the drawing board to redesign the printed circuit board costing months of development time.

My EMI Testing Experience

There are certain standards that you need to meet for EMI. In October 2006 I attempted to obtain US/Australian/European EMI compliance for the following system (the 4fx telephony boards combined with a BF537 STAMP):

The tests were performed by Austest, in their Adelaide Labs. The US standard for EMI is known as FCC-15. The Australian/European standards overlap in most areas so can be performed at the same time.

The idea was to use the STAMP (an off the shelf development board from Analog Devices) plus my 4fx daughter board to get a first pass product “to market” quickly, without the engineering effort required to develop our own Blackfin motherboard. This would be a a good way to get the technology into real world use quickly. We could then follow up with a lower cost/volume manufactured custom motherboard.

Unfortunately, I flunked part of the tests. Below I describe why I flunked and how I traced the problem. I have got to admit that this hurts – these tests cost me around US$3,000 out of my own pocket! However maybe by blogging on it I can share some of the experience I gained and help share some of the value from the tests.

This means that we can’t use the STAMP/4fx combination for a real-world, volume manufactured product, although it’s OK for “test and evaluation” (the EMI standards generally have exemptions for development work).

The good news is the telephony daughter board looks good from an EMI point of view – it was the STAMP board that was radiating too strongly to meet the requirements of FCC-15. So with a Blackfin DSP motherboard designed to minimise EMI we should be able to eventually pass the EMI tests OK.

The EMI Test Procedure

The EMI tests are designed to accurately measure radiation from your product, called the Equipment Under Test or EUT. Radiation can come from a variety of sources:

  1. Any cable connected to your device can act as an effective antenna under the right circumstances. For example power cables, Ethernet, and phone cables.
  2. The Printed Circuit Board (PCB) can also radiate directly. High frequency currents can flow around the board, for example from a clock oscillator through the power supply rails. If the loop area of the current is large (say due to the PCB layout), it may radiate EMI.

The FCC-15 tests are divided into two sorts of tests, designed to pick up EMI in different parts of the spectrum:

  1. Conducted tests, where voltages conducted down the cables are sampled.
  2. Radiated tests, where the actual radiation of the EUT is measured using an antenna.

Conducted tests

Conducted tests are used for lower frequencies (150kHz to 30MHz). Low frequency signals have long wavelengths. At these frequencies it’s easier to determine if the EUT is likely to radiate by sampling the voltages on the cables connected to the EUT, rather than say using an antenna. Otherwise you might need very large antennas (like several km long) to be sensitive to radiations at low frequencies. Common problem at these frequencies are switching power supply noise. For example those big lumps in your power supply cables are ferrites that are designed to block power supply noise travelling down the power supply cable.

The conducted tests were performed inside a shielded room. Note the careful arrangement of the EUT, wires were connected to all ports to simulate real world operation. Any little change in this configuration could change the EMI signature.

To sample the signals special boxes are used that are carefully calibrated to sample any EMI signals on the Ethernet/telephone/power cables without affecting normal operation:

The signals detected by these boxes are fed to a spectrum analyser – a device that can measure the EMI energy in various parts of the spectrum and determine if it is above or beneath the required levels.

The levels for the conducted tests were sampled from the power, Ethernet, RS232 serial, FXS and FXO ports and found to meet the requirements. All well and good, so on to the radiated tests.

Radiated Tests

For higher frequencies (30MHz to 1.5GHz in this case), an antenna is used to directly sense EMI from the EUT. The test lab I used have an outdoor test site:

Outdoor test sites tend to be in relatively remote locations, away from any ambient sources of radio waves that might interfere with the tests. You can see that this site is in a valley, with only a few houses in sight. The sites are carefully calibrated each time they are used to make sure there are no new sources of “ambients”.

The EUT is placed on a rotating table, so its EMI radiation can be measured at different angles:

A very special (and very expensive) antenna is used to sense the EMI radiation. This is carefully calibrated and has a known response across the frequencies of interest:

Below is an example of the typical test results. This graph measures the level of EMI energy between 30MHz and 1500MHz. Click on the image to get a larger, more legible version.

The green line shows the background (or ambient) radio signals at the site, the black line shows the combination of ambient plus the EUT. The red and blue lines show the permissible limits.

During the tests the antenna is moved up and down, and the EUT table rotated to maximise the signals from the EUT at various frequencies. The EMI signature tends to vary a lot with orientation and antenna height.

It was here that we hit some problems – the EUT was radiating a very strong signal at 300MHz – far exceeding the level allowable by the standard. The 300MHz signal was about as strong as a small radio transmitter (for example like one used to open your car doors)!

By a process of elimination we tracked the problem down to STAMP board itself. When all the cables (except power) and the telephony daughter boards were removed the STAMP sat there radiating approximately the same signal at 300MHz.

After a few hours of attempting to reduce the EMI level at 300MHz (for example shielded boxes, and metal plates under the STAMP board) we called it a day – the signal was just too strong to be easily fixed.

I guess the good news was that my telephony boards were fairly clean – telephony boards often have problems with radiation from phone cables (they make good antennas for EMI). However adding and removing the daughter boards and phone cables didn’t have much effect on the EMI levels.

Somewhat (OK very) disappointed, I retired to home base to think about the problem and do some tests.

Now I should emphasise that the BF537 STAMP board was not designed for EMI compliance, rather it was optimised for development purposes. These two requirements are at odds, for example on the STAMP all of the high speed address/data bus nets are routed to headers, which means lots of extra high speed nets on the board, all potential EMI radiators. In a commercial, FCC-15 compliant design, the number and length of high speed nets would be minimised. I was just hoping that the STAMP would be FCC-15 compliant and therefore suitable for early deployment of my telephony systems. So I took a chance and messed up. My mistake.

However I learnt a lot and had fun tracing the source of the EMI, as described below.

The Elusive EMI Bug Hunt

To track the problem I built a little sniffer probe: two turns of wire connected to 50 ohm coax. I viewed the signal from the sniffer using a 500MHz scope with the input set for 50 ohm termination. One handy feature of my scope was a FFT function – this let me see the 300 MHz signal on a frequency scale. I could also see the signal on the regular time domain display when the sniffer probe was close to the STAMP.

When placed near the STAMP PCB a very clear 300MHz signal can be seen. The level of the signal varies as the probe is moved over different parts of the board.

Here is a picture of the sniffer probe in action. It is like a poor antenna, that picks up EMI from just a few cm away – useful for localising the source of the EMI on the PCB.

Here are the initial results:

  1. I found that the 300MHz noise was all over the ground plane, but is not present in the power cable. This suggests that the noise is not being radiated by the power cable.
  2. I found peaks in the signal level over the SDRAM chips. This is expected, as there is a 100MHz bus connecting the SDRAM chips to the CPU, which means lots of digital noise.
  3. Curiously, I found another big peak over the “Blackfin” graphic (see photo above). This peak was not expected, as there were no parts loaded on this part of the PCB (on the upper or lower side).

Now 300MHz is the 3rd harmonic of the 100MHz bus frequency. Digital signals are square waves which are made up of odd-harmonics of the square wave frequency, so from a 100MHz bus we would expect to see energy at 100MHz, 300MHz, 500MHz, etc.

I guessed that the 300MHz signal was a harmonic of the 100MHz bus that for some reason was radiating effectively from the PCB. To test this theory I changed the bus frequency to 125MHz, and saw the strong signal at 300MHz shift up to 375MHz. So it looks like the source of the EMI is the bus.

Now to radiate EMI you need a signal source (the bus in this case) and an effective antenna (for example a cable around one quarter of the wavelength or a current loop of similar size).

I suspect the PCB has a resonance at around 300MHz. This would explain why the signal is so strong at 300MHz but the fundamental (100MHz) and 5th harmonic (500MHz) are not visible on the scope.

At 300MHz, a good 1/4 wave antenna would be 25cm long – close to the length of the board. There could be AC currents travelling over tracks of that length of the PCB board.

Splits in PCB Power Plane

Fortunately the STAMP designs are all open. I therefore inspected the BF537 STAMP Gerber files, which are available from the Blackfin site. Gerber files are the graphics files that define the Printed Circuit Board (PCB) layout. They are the files you send to the PCB house to get your boards made. The BF537 STAMP board is an 8 layer design.

There is a very nice Linux Gerber viewer program called gerbv that comes with the gEDA tools that I have used to design the 4fx hardware. To view the Gerber files I unzipped the STAMP Gerbers then ran gerbv:
$gerbv *.pho&

I took a look at the PCB in the area of the Blackfin logo:

The image above has the layer 0 (a signal layer) and layer 1 (VCC power plane) displayed. Layer 0 has some wiring for high speed signals. Layer 1 is the VCC plane and is split into areas for each VCC rail (5V, 3V3, 1V2 etc).

Now remember that my sniffer found a peak over the Blackfin logo – this area is the rectangular box in the image above. Curiously, this area corresponds to a split in layer 1, the VCC plane.

High speed digital signals like to take the path of least impedance, i.e. the most direct path (Note: see comment below by Icarus75 on this). They tend to flow out of a pin, along a net, then back through the ground or power plane to the ground pin of the chip generating the signal.

A split in power or ground plane causes the signal to take a longer path (it must flow around the split), causing the total loop area to increase. Signals flowing through large loop areas make good antennas for EMI.

If layer 1 is placed directly under Layer 0 it will not be doing a good job as an signal return path – the splits will cause signals to take big detours, with large loop areas, and generate lots of EMI (plus possibly other high speed digital issues).

To minimise loop area (and hence EMI) you really want a continuous plane (VCC or GND) under any high speed nets.

So my theory is that the EMI is being caused by having a split power plane directly beneath a high speed signal layer, i.e. the problem may be the PCB layout, or more correctly the ordering of the layers in the PCB. This theory is supported by the high level of the problem 300MHz signal found over a split in the VCC plane.

Next Steps

The next step is to design a new DSP motherboard that is FCC-15 compliant. As a first step I have been working with a team of open developers on the BlackfinOne project. This is Blackfin DSP motherboard, designed using the gEDA open CAD tools by a community of developers. This design has been customised a little for telephony work and some steps have been taken at the design stage to minimise EMI. Several people in the BlackfinOne community now have this design up and running.

When I have loaded my BlackfinOne, I will do some preliminary in-house testing of the design before determining if the board will be submitted for FCC-15 testing. It is possible to construct some test jigs to do preliminary EMI testing outside of the EMI labs. Although uncalibrated, it should be possible to determine if there are any serious problems. More on this in another post!

Thanks

Thanks to Paul Kay at Austest for patiently explaining to me the issues involved with EMI. Despite the poor results, he made the two days we spent testing enjoyable and a fascinating learning experience!
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