For the $10 ATA I am using a Gyrator circuit that I found here via the Wikipedia Gyrator entry:

A gyrator “looks” like an inductor (Ldc in this model of the ATA); in my application it blocks AC currents in the ATA . Rdc models the telephone off-hook DC resistance. I understand how the AC side works; the capacitor acts to keep the base voltage constant, limiting any AC variations in Ic as V changes. However I couldn’t intuitively understand the DC behaviour, i.e. how does the steady state Ic vary with V?

My rusty transistor analysis skills frustrated me, so over a few days I spent an hour here and there trying different approaches, including SPICE modelling and a bunch of equations. Just the odd sort of thing I like to do while others are enjoying New Years Day celebrations! Sort of like solving a puzzle for some people I guess.

Finally I worked out some maths that agreed with the SPICE model – the Gyrator looks like a resistor with resistance Rg = R1/Beta. I couldn’t find this result anywhere else on the Internet, so here is the derivation:

Re is the total resistance in the emitter current path i.e. Re=R3+Rdc. Note that the first term of Ic varies linearly with V, effectively a resistor R=Rg+Re, where Rg=R1/Beta. The second constant term is a small offset in the current that accounts for the small V non-linear region before the transistor switches fully on.

**SPICE simulation**

I used ngspice (which came with my copy of gEDA) to figure out what was going on. Here is the gyrator.net source (DC operating point version):

GYRATOR DC SPICE SIMULATION

R1 1 2 10000

R2 2 3 10000

R3 3 4 47

C1 2 4 1E-6

Q1 1 2 3 MOD1

RB 4 0 200

VB 1 0 DC 48

.MODEL MOD1 NPN BF=200

.OP

.END

This performs a steady state operating point analysis that calculates Ic for any given V (called VB in the SPICE simulation). I ran it like this for a few different V’s (48,40, and 20V):

$ ngspice -b gyrator.net

I also produced some tables of Ic against V, using this SPICE source:

GYRATOR DC SPICE SIMULATION

R1 1 2 10000

R2 2 3 10000

R3 3 4 47

C1 2 4 1E-6

Q1 1 2 3 MOD1

RB 4 0 200

VB 1 0 DC 48

.MODEL MOD1 NPN BF=200

*.DC VB 0 48 0.1

*.PRINT DC I(VB)

.END

Note the use of sed to extract a table that could be directly loaded into Octave for plotting:

$ ngspice -b gyrator.net -o out.txt

$ cat out.txt | sed -n '/^[0-9]/p' > out.col

octave:1> load out.col

octave:2> plot(out(:,2),-out(:,3))

Here is the Octave plot:

You can see that there is a non-linear part of the curve near V=0 before Q1 switches fully on. After that the slope is straight, indicating linear resistance. There is surprisingly good agreement between the maths and SPICE simulation. This is surprising because I am usually hopeless at this sort of analysis! Here are the results with Beta=200:

Calculated | SPICE Simulation | |||

V | Ic | Rg | Ic | Rg |

48 | 0.157 | 50 | 0.156 | |

40 | 0.130 | 50 | 0.129 | 49.3 |

20 | 0.0.063 | 50 | 0.062 | 51.5 |

For the SPICE simulation Rg was calculated as Rg=deltaV/deltaIc, e.g. (48-40)/(0.156-0.129), hence the first Rg (SPICE) value is empty on the V=48 row. We can’t just use V/Ic as the non-linear section of the curve would mess up the result; unlike a real resistor the Gyrator V/Ic curve has a small offset from the origin.

For real-world transistors Beta will vary widely, say between 100 and 400. However as the Rg component is fairly small compared to the other resistances (e.g. Rdc varies between 200-400 ohms for typical phones) and we will have closed loop current regulation for the ATA we could be OK.

OK, enough brushing up on my transistor analysis skills, time to get back to the ATA development!

Something looks wrong in that plot, compared to the schematic. The DC conditions should settle with the emitter about 2 diode drops (i.e. 1.4V) below the rail. V will be 1.4V greater than Ve for any V significantly greater than 1.4V, and the current will be (V – 1.4)/(R3 + Rdc). Your plot basically follows that pattern, except the slope of the line implies R3 + Rdc is about 300 ohms. However, your schematic says its 247 ohms.

Steve, with one transistor, why two voltage drops (1.4V)?

As derived in the expressions above, the dynamic part of the DC resistance is R1/Beta + Rdc = 10000/200 + 247 = 50+247 = 297 ohms, close to 300 ohms as the slope suggests.

You know by looking at the schematic I can’t inuitively see why this is so – this is why I stood back and did the math. However the SPICE simulation closely matches the math (and the real circuit).

Cheers,

David

R1 and R2 are equal. R2 will have a diode drop across it. Because of their values, Ib is small compared to the current through the resistors. Therefore R1 will also have a diode drop’s worth of volts across it.

I was taking a first order approximation, that the transistor would drop 2 diode drops, because of R1 and R2. However, the load resistors are quite small, and you’ve used a fairly low beta for the transistor. As you point out, that does add about another 50 ohms.

As to the AC characteristics, is my assumption

Leq = C1 * R12 * R3

correct?

R12 is simply R1||R2 (i.e. in parallel), Leq is the equivalent inductance.