--- uClinux-dist-orig/linux-2.6.x/arch/blackfin/Kconfig 2007-02-26 23:46:45.000000000 +1030 +++ uClinux-dist/linux-2.6.x/arch/blackfin/Kconfig 2007-05-06 11:46:05.000000000 +0930 @@ -156,12 +156,24 @@ choice prompt "System type" - default BFIN533_STAMP + default BLACKFIN_ONE_V2 help Do NOT change the board here. Please use the top level configuration to ensure that all the other settings are correct. +config BLACKFIN_ONE_V2 + bool "BLACKFIN_ONE_V2" + depends on (BF532) + help + BlackfinOne v2 board Support. + +config BLACKFIN_ONE_V1 + bool "BLACKFIN_ONE_V1" + depends on (BF532) + help + BlackfinOne v1 board Support. + config BFIN533_EZKIT bool "BF533-EZKIT" depends on (BF533 || BF532 || BF531) @@ -219,6 +231,51 @@ endchoice +choice + prompt "Use SDRAM chip " + default MEM_MT48LC16M16A2TG_7E + depends on (BLACKFIN_ONE_V1 || BLACKFIN_ONE_V2) + help + Select SDRAM chip + +config MEM_MT48LC8M16A2TG_75 + bool "8Mx16 MT48LC8M16A2TG_75" + depends on (BLACKFIN_ONE_V1 || BLACKFIN_ONE_V2) + help + refresh period 64mS, 4096 row addresses, CAS Latency 3, 9 col addresses + +config MEM_MT48LC8M16A2TG_7E + bool "8Mx16 MT48LC8M16A2TG_7E" + depends on (BLACKFIN_ONE_V1 || BLACKFIN_ONE_V2) + help + refresh period 64mS, 4096 row addresses, CAS Latency 2, 9 col addresses + +config MEM_MT48LC16M16A2TG_75 + bool "16Mx16 MT48LC16M16A2TG_75" + depends on (BLACKFIN_ONE_V1 || BLACKFIN_ONE_V2) + help + refresh period 64mS, 8192 row addresses, CAS Latency 3, 9 col addresses + +config MEM_MT48LC16M16A2TG_7E + bool "16Mx16 MT48LC16M16A2TG_7E" + depends on (BLACKFIN_ONE_V1 || BLACKFIN_ONE_V2) + help + refresh period 64mS, 8192 row addresses, CAS Latency 2, 9 col addresses + +config MEM_MT48LC32M16A2TG_75 + bool "32Mx16 MT48LC32M16A2TG_75" + depends on (BLACKFIN_ONE_V1 || BLACKFIN_ONE_V2) + help + refresh period 64mS, 8192 row addresses, CAS Latency 3, 10 col addresses + +config MEM_MT48LC32M16A2TG_7E + bool "32Mx16 MT48LC32M16A2TG_7E" + depends on (BLACKFIN_ONE_V1 || BLACKFIN_ONE_V2) + help + refresh period 64mS, 8192 row addresses, CAS Latency 2, 10 col addresses + +endchoice + config MEM_GENERIC_BOARD bool depends on GENERIC_BOARD @@ -246,9 +303,13 @@ default y config BFIN_SHARED_FLASH_ENET - bool - depends on (BFIN533_STAMP) - default y + bool "Shared Flash and Ethernet" + help + Some Blackfin systems (e.g. BF533 STAMP and BlackfinOne V2) map + both Ethernet and NOR flash onto the same address space, and use + a PF pin for decoding. For the IP04 this option should be N. + depends on (IP04 || BLACKFIN_ONE_V2 || BFIN533_STAMP) + default n source "arch/blackfin/mach-bf533/Kconfig" source "arch/blackfin/mach-bf561/Kconfig" @@ -260,6 +321,7 @@ config CLKIN_HZ int "Crystal Frequency in Hz" + default "10000000" if (BLACKFIN_ONE_V1 || BLACKFIN_ONE_V2) default "11059200" if BFIN533_STAMP default "27000000" if BFIN533_EZKIT default "25000000" if BFIN537_STAMP @@ -269,12 +331,26 @@ The frequency of CLKIN crystal oscillator on the board in Hz. config MEM_SIZE + int + default 16 if (BLACKFIN_ONE_V1 || BLACKFIN_ONE_V2) && (MEM_MT48LC8M16A2TG_7E || MEM_MT48LC8M16A2TG_75) + default 32 if (BLACKFIN_ONE_V1 || BLACKFIN_ONE_V2) && (MEM_MT48LC16M16A2TG_7E || MEM_MT48LC16M16A2TG_75) + default 64 if (BLACKFIN_ONE_V1 || BLACKFIN_ONE_V2) && (MEM_MT48LC32M16A2TG_7E || MEM_MT48LC32M16A2TG_75) + depends on (BLACKFIN_ONE_V1 || BLACKFIN_ONE_V2) + +config MEM_SIZE int "SDRAM Memory Size in MBytes" default 32 if BFIN533_EZKIT default 64 if BFIN537_STAMP default 64 if BFIN561_EZKIT default 128 if BFIN533_STAMP default 64 if PNAV10 + depends on (!(BLACKFIN_ONE_V1 || BLACKFIN_ONE_V2)) + +config MEM_ADD_WIDTH + int + default 9 if (MEM_MT48LC8M16A2TG_7E || MEM_MT48LC8M16A2TG_75 || MEM_MT48LC16M16A2TG_7E || MEM_MT48LC16M16A2TG_75) + default 10 if (MEM_MT48LC32M16A2TG_7E || MEM_MT48LC32M16A2TG_75) + depends on (MEM_MT48LC8M16A2TG_7E || MEM_MT48LC8M16A2TG_75 || MEM_MT48LC16M16A2TG_7E || MEM_MT48LC16M16A2TG_75 || MEM_MT48LC32M16A2TG_7E || MEM_MT48LC32M16A2TG_75) config MEM_ADD_WIDTH int "SDRAM Memory Address Width" @@ -286,8 +362,9 @@ config ENET_FLASH_PIN int "PF port/pin used for flash and ethernet sharing" - depends on (BFIN533_STAMP) - default 0 + depends on (BFIN533_STAMP || BLACKFIN_ONE_V2) + default 1 if BFIN533_STAMP + default 8129 if BLACKFIN_ONE_V2 help PF port/pin used for flash and ethernet sharing to allow other PF pins to be used on other platforms without having to touch common @@ -376,11 +453,25 @@ default 0x08 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 2) default 0x10 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 3) +#if BLACKFIN_ONE_V2 + +comment "Hardware addresses" + +config BF1_NET1 + hex "DM9000 address" + default 0x20100000 + help + Base address of DM9000A Ethernet chip + +#endif + comment "Console UART Setup" choice prompt "Baud Rate" - default BAUD_57600 + default BAUD_57600 if (!(BLACKFIN_ONE_V1 || BLACKFIN_ONE_V2)) + default BAUD_115200 if (BLACKFIN_ONE_V1 || BLACKFIN_ONE_V2) + config BAUD_9600 bool "9600" config BAUD_19200 @@ -647,6 +738,7 @@ config VCO_MULT int "VCO Multiplier" depends on BFIN_KERNEL_CLOCK + default "40" if BLACKFIN_ONE_V1 || BLACKFIN_ONE_V2 default "22" if BFIN533_EZKIT default "45" if BFIN533_STAMP default "20" if BFIN537_STAMP @@ -658,6 +750,7 @@ config CCLK_DIV int "Core Clock Divider" depends on BFIN_KERNEL_CLOCK + default 1 if BLACKFIN_ONE_V1 || BLACKFIN_ONE_V2 default 1 if BFIN533_EZKIT default 1 if BFIN533_STAMP default 1 if BFIN537_STAMP @@ -669,6 +762,7 @@ config SCLK_DIV int "System Clock Divider" depends on BFIN_KERNEL_CLOCK + default 3 if BLACKFIN_ONE_V1 || BLACKFIN_ONE_V2 default 5 if BFIN533_EZKIT default 5 if BFIN533_STAMP default 4 if BFIN537_STAMP @@ -744,19 +838,23 @@ menu "EBIU_AMBCTL Control" config BANK_0 hex "Bank 0" - default 0x7BB0 + default 0x7BB0 if (!(BLACKFIN_ONE_V1 || BLACKFIN_ONE_V2)) + default 0xffc2 if BLACKFIN_ONE_V1 || BLACKFIN_ONE_V2 config BANK_1 hex "Bank 1" - default 0x7BB0 + default 0x7BB0 if (!(BLACKFIN_ONE_V1 || BLACKFIN_ONE_V2)) + default 0xffc2 if BLACKFIN_ONE_V1 || BLACKFIN_ONE_V2 config BANK_2 hex "Bank 2" - default 0x7BB0 + default 0x7BB0 if (!(BLACKFIN_ONE_V1 || BLACKFIN_ONE_V2)) + default 0xffc2 if BLACKFIN_ONE_V1 || BLACKFIN_ONE_V2 config BANK_3 hex "Bank 3" - default 0x99B3 + default 0x99B3 if (!(BLACKFIN_ONE_V1 || BLACKFIN_ONE_V2)) + default 0xffc2 if BLACKFIN_ONE_V1 || BLACKFIN_ONE_V2 endmenu endmenu @@ -956,7 +1054,8 @@ config BOOTPARAM_STRING string "Kernel Boot Parameter" - default "console=ttyS0,57600" + default "console=ttyS0,57600" if (!(BLACKFIN_ONE_V1 || BLACKFIN_ONE_V2)) + default "console=ttyS0,115200" if BLACKFIN_ONE_V1 || BLACKFIN_ONE_V2 depends on BOOTPARAM config NO_KERNEL_MSG --- uClinux-dist-orig/linux-2.6.x/arch/blackfin/mach-bf533/boards/bf1.c 1970-01-01 09:30:00.000000000 +0930 +++ uClinux-dist/linux-2.6.x/arch/blackfin/mach-bf533/boards/bf1.c 2007-05-06 08:53:10.000000000 +0930 @@ -0,0 +1,336 @@ +/* + * File: arch/blackfin/mach-bf533/bf1.c + * Based on: arch/blackfin/mach-bf533/stamp.c + * Author: Ivan Danov + * + * Created: 2006 + * Description: Board Info File for the BlackfinOne boards + * + * Rev: $Id: bf1.c,v 1.1 2006/10/23 09:54:16 danov Exp $ + * + * Modified: + * Copyright 2006 Intratrade Ltd. + * Copyright 2005 National ICT Australia (NICTA) + * Copyright 2004-2006 Analog Devices Inc. + * + * Bugs: Enter bugs at http://blackfin.uclinux.org/projects/bf1 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see the file COPYING, or write + * to the Free Software Foundation, Inc., + * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include +#include +#include +#include +#include +#include +#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) +#include +#endif +#include +#include + +/* + * Name the Board for the /proc/cpuinfo + */ +#if defined (CONFIG_BLACKFIN_ONE_V1) +char *bfin_board_name = "BlackfinOne BF532 v1"; +#elif defined (CONFIG_BLACKFIN_ONE_V2) +char *bfin_board_name = "BlackfinOne BF532 v2"; +#else +#error Unknown board +#endif + +/* + * Driver needs to know address, irq and flag pin. + */ +#if defined (CONFIG_BLACKFIN_ONE_V2) +#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) + +#include + +static struct resource dm9000_resource1[] = { + [0] = { + .start = CONFIG_BF1_NET1, + .end = CONFIG_BF1_NET1 + 1, + .flags = IORESOURCE_MEM + }, + [1] = { + .start = CONFIG_BF1_NET1 + 2, + .end = CONFIG_BF1_NET1 + 3, + .flags = IORESOURCE_MEM + }, + [2] = { + .start = IRQ_PF15, + .end = IRQ_PF15, + .flags = IORESOURCE_IRQ + } +}; + +/* +* for the moment we limit ourselves to 16bit IO until some +* better IO routines can be written and tested +*/ +static struct dm9000_plat_data dm9000_platdata1 = { + .flags = DM9000_PLATF_16BITONLY, +}; + +static struct platform_device dm9000_device1 = { + .name = "dm9000", + .id = 0, + .num_resources = ARRAY_SIZE(dm9000_resource1), + .resource = dm9000_resource1, + .dev = { + .platform_data = &dm9000_platdata1, + } +}; + +#endif +#endif // #if defined (CONFIG_BLACKFIN_ONE_V2) + + +#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) +/* all SPI peripherals info goes here */ + +#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) +static struct mtd_partition bfin_spi_flash_partitions[] = { + { + .name = "spi u-boot", + .offset = 0x00000000, + .size = 0x00030000, + .mask_flags = MTD_CAP_ROM + },{ + .name = "spi kernel", + .offset = 0x00030000, + .size = 0x00110000, + },{ + .name = "spi file system", + .offset = 0x00140000, + .size = 0x006c0000, + } +}; + +static struct flash_platform_data bfin_spi_flash_data = { + .name = "m25p80", + .parts = bfin_spi_flash_partitions, + .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions), + .type = "m25p64", +}; + +/* SPI flash chip (m25p64) */ +static struct bfin5xx_spi_chip spi_flash_chip_info = { + .ctl_reg = 0x1C00, /* with enable bit unset */ + .enable_dma = 0, /* use dma transfer with this chip*/ + .bits_per_word = 8, + .cs_change_per_word = 0, +}; +#endif + +#if defined(CONFIG_PBX) +static struct bfin5xx_spi_chip spi_si3xxx_chip_info = { + .ctl_reg = 0x1c04, + .enable_dma = 0, + .bits_per_word = 8, + .cs_change_per_word = 1, +}; +#endif + +#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) +static struct bfin5xx_spi_chip spi_mmc_chip_info = { +//CPOL (Clock Polarity) +// 0 - Active high SCK +// 1 - Active low SCK +// CPHA (Clock Phase) Selects transfer format and operation mode +// 0 - SCLK toggles from middle of the first data bit, slave select +// pins controlled by hardware. +// 1 - SCLK toggles from beginning of first data bit, slave select +// pins controller by user software. +// .ctl_reg = 0x1c00, // CPOL=1,CPHA=1,Sandisk 1G work +//NO NO .ctl_reg = 0x1800, // CPOL=1,CPHA=0 +//NO NO .ctl_reg = 0x1400, // CPOL=0,CPHA=1 + .ctl_reg = 0x1000, // CPOL=0,CPHA=0,Sandisk 1G work + .enable_dma = 0, // if 1 - block!!! + .bits_per_word = 8, + .cs_change_per_word = 0, +}; +#endif + +/* Notice: for blackfin, the speed_hz is the value of register + * SPI_BAUD, not the real baudrate */ +static struct spi_board_info bfin_spi_board_info[] __initdata = { +#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) + { + /* the modalias must be the same as spi device driver name */ + .modalias = "m25p80", /* Name of spi_driver for this device */ + /* this value is the baudrate divisor */ + .max_speed_hz = 2, /* actual baudrate is SCLK/(2xspeed_hz) */ + .bus_num = 1, /* Framework bus number */ + .chip_select = 2, /* Framework chip select.*/ + .platform_data = &bfin_spi_flash_data, + .controller_data = &spi_flash_chip_info, + }, +#endif + +#if defined(CONFIG_PBX) + { + .modalias = "fxs-spi", + .max_speed_hz = 4, + .bus_num = 1, + .chip_select = 3, + .controller_data= &spi_si3xxx_chip_info, + }, + + { + .modalias = "fxo-spi", + .max_speed_hz = 4, + .bus_num = 1, + .chip_select = 2, + .controller_data= &spi_si3xxx_chip_info, + }, +#endif +#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) +#if 0 + { + .modalias = "spi_mmc_dummy", + .max_speed_hz = 2, + .bus_num = 1, + .chip_select = 7, + .platform_data = NULL, + .controller_data = &spi_mmc_chip_info, + }, +#endif + { + .modalias = "spi_mmc", + .max_speed_hz = 2, + .bus_num = 1, + .chip_select = CONFIG_SPI_MMC_CS_CHAN, + .platform_data = NULL, + .controller_data = &spi_mmc_chip_info, + }, +#endif +}; + +/* SPI controller data */ +static struct bfin5xx_spi_master spi_bfin_master_info = { + .num_chipselect = 8, + .enable_dma = 1, /* master has the ability to do dma transfer */ +}; + +static struct platform_device spi_bfin_master_device = { + .name = "bfin-spi-master", + .id = 1, /* Bus number */ + .dev = { + .platform_data = &spi_bfin_master_info, /* Passed to driver */ + }, +}; +#endif /* spi master and devices */ + +#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) +static struct resource bfin_uart_resources[] = { + { + .start = 0xFFC00400, + .end = 0xFFC004FF, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device bfin_uart_device = { + .name = "bfin-uart", + .id = 1, + .num_resources = ARRAY_SIZE(bfin_uart_resources), + .resource = bfin_uart_resources, +}; +#endif + +#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) +static struct resource isp1362_hcd_resources[] = { + { + .start = CONFIG_BF1_USB, + .end = CONFIG_BF1_USB + 1, + .flags = IORESOURCE_MEM, + },{ + .start = CONFIG_BF1_USB + 2, + .end = CONFIG_BF1_USB + 3, + .flags = IORESOURCE_MEM, + },{ + .start = IRQ_PROG_INTA, + .end = IRQ_PROG_INTA, + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, + },{ + .start = IRQ_PF0 + CONFIG_USB_ISP1362_BFIN_GPIO, + .end = IRQ_PF0 + CONFIG_USB_ISP1362_BFIN_GPIO, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct isp1362_platform_data isp1362_priv = { + .sel15Kres = 1, + .clknotstop = 0, + .oc_enable = 0, // external OC + .int_act_high = 0, + .int_edge_triggered = 0, + .remote_wakeup_connected = 0, + .no_power_switching = 1, + .power_switching_mode = 0, +}; + +static struct platform_device isp1362_hcd_device = { + .name = "isp1362-hcd", + .id = 0, + .dev = { + .platform_data = &isp1362_priv, + }, + .num_resources = ARRAY_SIZE(isp1362_hcd_resources), + .resource = isp1362_hcd_resources, +}; +#endif + + +static struct platform_device *bf1_devices[] __initdata = { +#if defined (CONFIG_BLACKFIN_ONE_V2) +#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) + &dm9000_device1, +#endif +#endif // #if defined (CONFIG_BLACKFIN_ONE_V2) + +#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) + &spi_bfin_master_device, +#endif + +#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) + &bfin_uart_device, +#endif +#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) + &isp1362_hcd_device, +#endif +}; + +static int __init bf1_init(void) +{ + printk(KERN_INFO "%s(): chip_id=%08lX,dspid=%08X\n", + __FUNCTION__, + *((volatile unsigned long *)CHIPID), + bfin_read_DSPID()); + + printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__); + platform_add_devices(bf1_devices, ARRAY_SIZE(bf1_devices)); +#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) + spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); +#endif + return 0; +} + +arch_initcall(bf1_init); --- uClinux-dist-orig/linux-2.6.x/include/asm-blackfin/mach-bf533/mem_init.h 2006-09-26 08:47:45.000000000 +0930 +++ uClinux-dist/linux-2.6.x/include/asm-blackfin/mach-bf533/mem_init.h 2007-05-06 08:55:15.000000000 +0930 @@ -29,7 +29,15 @@ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ -#if (CONFIG_MEM_MT48LC16M16A2TG_75 || CONFIG_MEM_MT48LC64M4A2FB_7E || CONFIG_MEM_GENERIC_BOARD) +#if ( CONFIG_MEM_MT48LC16M16A2TG_75 || + CONFIG_MEM_MT48LC16M16A2TG_7E || + CONFIG_MEM_MT48LC8M16A2TG_75 || + CONFIG_MEM_MT48LC8M16A2TG_7E || + CONFIG_MEM_MT48LC32M16A2TG_75 || + CONFIG_MEM_MT48LC32M16A2TG_7E || + CONFIG_MEM_MT48LC64M4A2FB_7E || + CONFIG_MEM_GENERIC_BOARD) + #if (CONFIG_SCLK_HZ > 119402985) #define SDRAM_tRP TRP_2 #define SDRAM_tRP_num 2 @@ -111,6 +119,41 @@ #define SDRAM_CL CL_3 #endif +#if (CONFIG_MEM_MT48LC16M16A2TG_7E) + /*SDRAM INFORMATION: */ +#define SDRAM_Tref 64 /* Refresh period in milliseconds */ +#define SDRAM_NRA 8192 /* Number of row addresses in SDRAM */ +#define SDRAM_CL CL_2 +#endif + +#if (CONFIG_MEM_MT48LC8M16A2TG_75) + /*SDRAM INFORMATION: */ +#define SDRAM_Tref 64 /* Refresh period in milliseconds */ +#define SDRAM_NRA 4096 /* Number of row addresses in SDRAM */ +#define SDRAM_CL CL_3 +#endif + +#if (CONFIG_MEM_MT48LC8M16A2TG_7E) + /*SDRAM INFORMATION: */ +#define SDRAM_Tref 64 /* Refresh period in milliseconds */ +#define SDRAM_NRA 4096 /* Number of row addresses in SDRAM */ +#define SDRAM_CL CL_2 +#endif + +#if (CONFIG_MEM_MT48LC32M16A2TG_75) + /*SDRAM INFORMATION: */ +#define SDRAM_Tref 64 /* Refresh period in milliseconds */ +#define SDRAM_NRA 8192 /* Number of row addresses in SDRAM */ +#define SDRAM_CL CL_3 +#endif + +#if (CONFIG_MEM_MT48LC32M16A2TG_7E) + /*SDRAM INFORMATION: */ +#define SDRAM_Tref 64 /* Refresh period in milliseconds */ +#define SDRAM_NRA 8192 /* Number of row addresses in SDRAM */ +#define SDRAM_CL CL_2 +#endif + #if (CONFIG_MEM_MT48LC64M4A2FB_7E) /*SDRAM INFORMATION: */ #define SDRAM_Tref 64 /* Refresh period in milliseconds */ --- uClinux-dist-orig/linux-2.6.x/arch/blackfin/mach-bf533/boards/Makefile 2006-07-29 15:06:15.000000000 +0930 +++ uClinux-dist/linux-2.6.x/arch/blackfin/mach-bf533/boards/Makefile 2007-05-06 08:53:10.000000000 +0930 @@ -6,3 +6,5 @@ obj-$(CONFIG_BFIN533_STAMP) += stamp.o obj-$(CONFIG_BFIN533_EZKIT) += ezkit.o obj-$(CONFIG_BFIN533_BLUETECHNIX_CM) += cm_bf533.o +obj-$(CONFIG_BLACKFIN_ONE_V1) += bf1.o +obj-$(CONFIG_BLACKFIN_ONE_V2) += bf1.o --- uClinux-dist-orig/linux-2.6.x/include/asm-blackfin/io.h 2007-01-27 02:29:03.000000000 +1030 +++ uClinux-dist/linux-2.6.x/include/asm-blackfin/io.h 2007-05-06 08:55:15.000000000 +0930 @@ -84,6 +84,16 @@ #define iowrite16(val,X) writew(val,X) #define iowrite32(val,X) writel(val,X) +#if 1 // danov +#define readsb(a,d,c) insb(a,d,c) +#define readsw(a,d,c) insw(a,d,c) +#define readsl(a,d,c) insl(a,d,c) + +#define writesb(a,d,c) outsb(a,d,c) +#define writesw(a,d,c) outsw(a,d,c) +#define writesl(a,d,c) outsl(a,d,c) +#endif + #define IO_SPACE_LIMIT 0xffffffff /* Values for nocacheflag and cmode */ --- uClinux-dist-orig/linux-2.6.x/drivers/mtd/maps/Kconfig 2007-01-11 22:43:09.000000000 +1030 +++ uClinux-dist/linux-2.6.x/drivers/mtd/maps/Kconfig 2007-05-06 08:53:10.000000000 +0930 @@ -570,7 +570,9 @@ depends on BFIN select MTD_PARTITIONS help - Flash Chip from ST Microelctronics + NOR Flash for Blackfin Systems. Usually Y for STAMPs, BlackfinOne + V1 & V2 but N for IP04 which does not have NOR flash. + default n config BFIN_FLASH_SIZE depends on MTD_BF5xx --- uClinux-dist-orig/linux-2.6.x/drivers/serial/bfin_5xx.c 2007-03-13 21:16:09.000000000 +1030 +++ uClinux-dist/linux-2.6.x/drivers/serial/bfin_5xx.c 2007-05-12 20:31:20.000000000 +0930 @@ -61,6 +61,19 @@ /* * Setup for console. Argument comes from the menuconfig */ + +#if defined(CONFIG_BAUD_9600) +#define CONSOLE_BAUD_RATE 9600 +#elif defined(CONFIG_BAUD_19200) +#define CONSOLE_BAUD_RATE 19200 +#elif defined(CONFIG_BAUD_38400) +#define CONSOLE_BAUD_RATE 38400 +#elif defined(CONFIG_BAUD_57600) +#define CONSOLE_BAUD_RATE 57600 +#elif defined(CONFIG_BAUD_115200) +#define CONSOLE_BAUD_RATE 115200 +#endif + #define DMA_RX_XCOUNT 512 #define DMA_RX_YCOUNT (PAGE_SIZE / DMA_RX_XCOUNT) @@ -845,7 +858,7 @@ bfin_serial_console_setup(struct console *co, char *options) { struct bfin_serial_port *uart; - int baud = 57600; + int baud = CONSOLE_BAUD_RATE; int bits = 8; int parity = 'n'; #ifdef CONFIG_SERIAL_BFIN_CTSRTS --- uClinux-dist-orig/linux-2.6.x/drivers/mtd/maps/bf5xx-flash.c 2007-01-27 02:29:03.000000000 +1030 +++ uClinux-dist/linux-2.6.x/drivers/mtd/maps/bf5xx-flash.c 2007-05-06 08:53:10.000000000 +0930 @@ -204,6 +204,29 @@ static unsigned long bf5xx_max_flash_size = CONFIG_BFIN_FLASH_SIZE; +#if defined(CONFIG_BLACKFIN_ONE_V1) || defined(CONFIG_BLACKFIN_ONE_V2) +static struct mtd_partition bf5xx_partitions[] = { + { + name: "u-boot", + size: 0x20000, + //size: 0x1FFFF, + offset: 0, + },{ + name: "kernel", + size: 0x110000, + //size: 0x10FFFF, + offset: 0x20000, + }, + { + name: "rootfs", + size: 0x2c0000, + //size: 0x2bffff, + offset: 0x130000, + } +}; + +#else + static struct mtd_partition bf5xx_partitions[] = { { name: "Bootloader", @@ -233,6 +256,9 @@ #endif }; +#endif + + #define NB_OF(x) (sizeof(x)/sizeof(x[0])) @@ -250,11 +276,30 @@ if(setup_pfpins()) return -EBUSY; +#if defined(CONFIG_BLACKFIN_ONE_V1) || defined(CONFIG_BLACKFIN_ONE_V2) + printk(KERN_NOTICE "BF5xx flash: probing %d-bit flash bus for cfi_probe\n", + bf5xx_map.bankwidth*8); + mymtd = do_map_probe("cfi_probe", &bf5xx_map); + if (mymtd) goto l_found; + + printk(KERN_NOTICE "BF5xx flash: probing %d-bit flash bus for smt_flash\n", + bf5xx_map.bankwidth*8); + mymtd = do_map_probe("stm_flash", &bf5xx_map); + if (mymtd) goto l_found; + + printk(KERN_NOTICE "BF5xx flash: probing %d-bit flash bus for jedec_probe\n", + bf5xx_map.bankwidth*8); + mymtd = do_map_probe("jedec_probe", &bf5xx_map); + if (mymtd) goto l_found; + return -ENXIO; + +l_found: +#else printk(KERN_NOTICE "BF5xx flash: probing %d-bit flash bus\n", bf5xx_map.bankwidth*8); mymtd = do_map_probe("stm_flash", &bf5xx_map); if (!mymtd) return -ENXIO; - +#endif /* * Static partition definition selection */ --- uClinux-dist-orig/linux-2.6.x/drivers/mtd/nand/bfin_nand.c 2007-02-07 04:11:48.000000000 +1030 +++ uClinux-dist/linux-2.6.x/drivers/mtd/nand/bfin_nand.c 2007-05-06 10:57:36.000000000 +0930 @@ -53,24 +53,16 @@ * Define partitions for flash device */ const static struct mtd_partition partition_info[] = { - { + { .name = "linux kernel", - .offset = 0, - .size = 4 *1024*1024, + .offset = 0, + .size = 0x400000, }, -#ifdef CONFIG_PNAV10 /* 1G x 8 NAND Flash */ - { - .name = "file system", - .offset = 4 *1024*1024, - .size = (1024-4) *1024*1024, - } -#else { .name = "file system", - .offset = 4 *1024*1024, - .size = (128-4) *1024*1024, + .offset = 0x400000, + .size = (CONFIG_BFIN_NAND_SIZE-0x400000) } -#endif }; /* --- uClinux-dist-orig/linux-2.6.x/drivers/mtd/nand/Kconfig 2007-01-11 22:43:09.000000000 +1030 +++ uClinux-dist/linux-2.6.x/drivers/mtd/nand/Kconfig 2007-05-06 08:53:10.000000000 +0930 @@ -2,7 +2,7 @@ # $Id: Kconfig 2632 2007-01-11 12:13:09Z cooloney $ menu "NAND Flash Device Drivers" - depends on MTD!=n + depends on MTD != n config MTD_NAND tristate "NAND Device Support" @@ -32,19 +32,29 @@ The original Linux implementation had byte 0 and 1 swapped. config MTD_NAND_BFIN - tristate "NAND Flash device for BF537 STAMP board" + tristate "NAND Flash device for Blackfin" depends on BFIN && MTD_NAND && MTD_PARTITIONS help - This enables the driver for the NAND flash ST-NAND123W3A - for Blackfin Processors + This enables the driver for the NAND flash for Blackfin + Processors. config BFIN_NAND_BASE hex "NAND Flash Base Address" depends on MTD_NAND_BFIN - default 0x20212000 + default 0x20000000 help NAND Flash Base Address +config BFIN_NAND_SIZE + hex "NAND Flash Size" + depends on MTD_NAND_BFIN + default 0x10000000 + help + NAND Flash size, for example 0x10000000 for 256Mbyte, or + 0x02000000 for 32MByte. The NAND will be divided into + two partitions. The first partition is 4M (kernel), the + second partition the remaining space (e.g. yaffs). + config BFIN_NAND_CLE int "NAND Flash Command Latch Enable (CLE) Address strobe A[x]" depends on MTD_NAND_BFIN --- uClinux-dist-orig/linux-2.6.x/drivers/net/dm9000.c 2007-01-10 19:02:17.000000000 +1030 +++ uClinux-dist/linux-2.6.x/drivers/net/dm9000.c 2007-05-06 16:38:39.000000000 +0930 @@ -66,6 +66,7 @@ #include #include #include +#include #include #include @@ -170,8 +171,49 @@ //#define DM9000_PROGRAM_EEPROM #ifdef DM9000_PROGRAM_EEPROM -static void program_eeprom(board_info_t * db); +static void dm9000_program_eeprom(board_info_t * db, char ethaddr[6]); #endif + + +static inline unsigned char str2hexnum(unsigned char c) +{ + if(c >= '0' && c <= '9') + return c - '0'; + if(c >= 'a' && c <= 'f') + return c - 'a' + 10; + if(c >= 'A' && c <= 'F') + return c - 'A' + 10; + return 0; /* foo */ +} + +static inline void str2eaddr(unsigned char *ea, unsigned char *str) +{ + int i; + + for(i = 0; i < 6; i++) { + unsigned char num; + + if((*str == '.') || (*str == ':')) + str++; + num = str2hexnum(*str++) << 4; + num |= (str2hexnum(*str++)); + ea[i] = num; + } +} + +#if defined(CONFIG_BFIN_SHARED_FLASH_ENET) +static void bfin_cpld_setup(void) +{ + + __builtin_bfin_ssync(); + bfin_write_FIO_DIR(bfin_read_FIO_DIR() | CONFIG_ENET_FLASH_PIN); + __builtin_bfin_ssync(); + bfin_write_FIO_FLAG_S(CONFIG_ENET_FLASH_PIN); + __builtin_bfin_ssync(); + +} +#endif + /* DM9000 network board routine ---------------------------- */ static void @@ -192,6 +234,7 @@ ior(board_info_t * db, int reg) { writeb(reg, db->io_addr); + __builtin_bfin_ssync(); return readb(db->io_data); } @@ -383,6 +426,25 @@ } } +static int dm9000_set_mac_address(struct net_device *ndev, void *p) { +struct board_info *db = (struct board_info *) netdev_priv(ndev); +struct sockaddr *addr = p; +int i, oft; + + if (!is_valid_ether_addr(addr->sa_data)) + return -EADDRNOTAVAIL; + + memcpy(ndev->dev_addr, addr->sa_data, ndev->addr_len); + for (i = 0, oft = 0x10; i < 6; i++, oft++) + iow(db, oft, ndev->dev_addr[i]); +#ifdef DM9000_PROGRAM_EEPROM + dm9000_program_eeprom(db, ndev->dev_addr); +#endif + return 0; +} + + + #define res_size(_r) (((_r)->end - (_r)->start) + 1) /* @@ -399,6 +461,10 @@ int iosize; int i; u32 id_val; + char *pmac; + char ethaddr[6]; + char s[30]; + /* Init network device */ ndev = alloc_etherdev(sizeof (struct board_info)); @@ -408,6 +474,10 @@ } SET_MODULE_OWNER(ndev); +#if defined(CONFIG_BFIN_SHARED_FLASH_ENET) + /* setup bf1 CPLD to route AMS0 to Ethernet MAC */ + bfin_cpld_setup(); +#endif SET_NETDEV_DEV(ndev, &pdev->dev); PRINTK2("dm9000_probe()"); @@ -451,7 +521,8 @@ pdev->name); if (db->addr_req == NULL) { - printk(KERN_ERR PFX "cannot claim address reg area\n"); + printk(KERN_ERR PFX "cannot claim address reg area " + "0x%08lX, %i\n", db->addr_res->start, i); ret = -EIO; goto out; } @@ -529,11 +600,13 @@ if (id_val == DM9000_ID) break; - printk("%s: read wrong id 0x%08x\n", CARDNAME, id_val); + printk("%s: read wrong id 0x%08x (addr %p, data %p)\n", + CARDNAME, id_val, db->io_addr, db->io_data); } if (id_val != DM9000_ID) { - printk("%s: wrong id: 0x%08x\n", CARDNAME, id_val); + printk("%s: wrong id: 0x%08x (addr %p, data %p)\n", + CARDNAME, id_val, db->io_addr, db->io_data); goto release; } @@ -549,6 +622,7 @@ ndev->stop = &dm9000_stop; ndev->get_stats = &dm9000_get_stats; ndev->set_multicast_list = &dm9000_hash_table; + ndev->set_mac_address = &dm9000_set_mac_address; #ifdef CONFIG_NET_POLL_CONTROLLER ndev->poll_controller = &dm9000_poll_controller; #endif @@ -570,8 +644,24 @@ ((u16 *) db->srom)[i] = read_srom_word(db, i); /* Set Node Address */ - for (i = 0; i < 6; i++) - ndev->dev_addr[i] = db->srom[i]; + + /* Check the command line argument */ + if (pdev-> id) + sprintf (s, "ethaddr%i", pdev-> id); + else + strcpy (s, "ethaddr"); + if (((pmac = strstr(saved_command_line, s)) != NULL) && + ((pmac = strstr(pmac, "=")) != NULL)) { + + str2eaddr(ethaddr, pmac + 1); + memcpy(ndev->dev_addr, ethaddr, 6); + } + + if (!is_valid_ether_addr(ndev->dev_addr)) { + /* Read the current MAC address set by the bootstrap ? */ + for (i = 0; i < 6; i++) + ndev->dev_addr[i] = db->srom[i]; + } if (!is_valid_ether_addr(ndev->dev_addr)) { /* try reading from mac */ @@ -586,7 +676,6 @@ platform_set_drvdata(pdev, ndev); ret = register_netdev(ndev); - if (ret == 0) { printk("%s: dm9000 at %p,%p IRQ %d MAC: ", ndev->name, db->io_addr, db->io_data, ndev->irq); @@ -596,8 +685,8 @@ } return 0; - release: - out: +release: +out: printk("%s: not found (%d).\n", CARDNAME, ret); dm9000_release_board(pdev, db); @@ -606,6 +695,66 @@ return ret; } +#if defined(CONFIG_BFIN) +static void bfin_dm9000_interrupt_setup (int irq) { +#ifdef CONFIG_IRQCHIP_DEMUX_GPIO + printk("Blackfin dm9000 interrupt setup: DEMUX_GPIO irq %d\n", irq); +// set_irq_type(irq, IRQT_HIGH); +// set_irq_type(irq, IRQT_LOW); +// set_irq_type(irq, IRQT_FALLING); + set_irq_type(irq, IRQF_TRIGGER_RISING); +// set_irq_type(irq, IRQT_BOTHEDGE); + +#else +#error MUST BE FIXED!!!! + +unsigned short flag; +unsigned short LAN_FIO_PATTERN; + + if (irq < IRQ_PF0 || irq > IRQ_PF15) { + printk(CARDNAME "irq out of range: %d\n", irq); + return; + } + + flag = irq - IRQ_PF0; + LAN_FIO_PATTERN = (1 << flag); +irq = IRQ_PROG_INTA;// hack!!! + printk("Blackfin dm9000 interrupt setup: flag PF%d, irq %d\n", + flag, irq); + /* 26 = IRQ_PROG_INTA => FIO_MASKA + 27 = IRQ_PROG_INTB => FIO_MASKB */ + if (irq == IRQ_PROG_INTA/*26*/ || irq == IRQ_PROG_INTB/*27*/) { + int ixab = (irq - IRQ_PROG_INTA) * + ((unsigned short *)FIO_MASKB_D - + (unsigned short *)FIO_MASKA_D); + + __builtin_bfin_csync(); + bfin_write16((unsigned short *)FIO_MASKA_C + ixab, + LAN_FIO_PATTERN); /* disable int */ + __builtin_bfin_ssync(); + + /* active high (input) */ + bfin_write_FIO_POLAR(bfin_read_FIO_POLAR() & ~LAN_FIO_PATTERN); + /* by level (input) */ + bfin_write_FIO_EDGE(bfin_read_FIO_EDGE() & ~LAN_FIO_PATTERN); + bfin_write_FIO_BOTH(bfin_read_FIO_BOTH() & ~LAN_FIO_PATTERN); + /* input */ + bfin_write_FIO_DIR(bfin_read_FIO_DIR() & ~LAN_FIO_PATTERN); + /* clear output */ + bfin_write_FIO_FLAG_C(LAN_FIO_PATTERN); + /* enable pin */ + bfin_write_FIO_INEN(bfin_read_FIO_INEN() | LAN_FIO_PATTERN); + + __builtin_bfin_ssync(); + /* enable int */ + bfin_write16((unsigned short *)FIO_MASKA_S + ixab, + LAN_FIO_PATTERN); + } +#endif /*CONFIG_IRQCHIP_DEMUX_GPIO*/ +} +#endif + + /* * Open the interface. * The interface is opened whenever "ifconfig" actives it. @@ -617,8 +766,20 @@ PRINTK2("entering dm9000_open\n"); +#ifdef CONFIG_BFIN +// bfin_gpio_interrupt_setup(/*IRQ_PROG_INTA*/, dev->irq, IRQT_RISING); + bfin_dm9000_interrupt_setup (dev->irq); +#endif + if (request_irq(dev->irq, &dm9000_interrupt, SA_SHIRQ, dev->name, dev)) + { + printk ("ERROR: dm9000: request_irq failed, irq=%i, name=%s\n", + dev-> irq, dev-> name); + return -EAGAIN; + } +#ifdef DR_PATCH_OLD if (request_irq(dev->irq, &dm9000_interrupt, IRQF_SHARED, dev->name, dev)) return -EAGAIN; +#endif /* Initialize DM9000 board */ dm9000_reset(db); @@ -803,6 +964,7 @@ } } + static irqreturn_t dm9000_interrupt(int irq, void *dev_id) { @@ -833,13 +995,14 @@ iow(db, DM9000_ISR, int_status); /* Clear ISR status */ /* Received the coming packet */ - if (int_status & ISR_PRS) + if (int_status & ISR_PRS) { dm9000_rx(dev); + } /* Trnasmit Interrupt check */ - if (int_status & ISR_PTS) + if (int_status & ISR_PTS) { dm9000_tx_done(dev, db); - + } /* Re-enable interrupt mask */ iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM); @@ -1011,7 +1174,7 @@ * we don't have valid content on a new board */ static void -program_eeprom(board_info_t * db) +dm9000_program_eeprom(board_info_t * db, char ethaddr[6]) { u16 eeprom[] = { 0x0c00, 0x007f, 0x1300, /* MAC Address */ 0x0000, /* Autoload: accept nothing */ @@ -1020,6 +1183,19 @@ 0x0000, }; /* Wake-up mode control */ int i; + + if (!is_valid_ether_addr(ethaddr)) { + printk (KERN_ERR "dm9000_program_eeprom: " + "invalid ethernet address\n"); + return; + } + printk (KERN_INFO "dm9000_program_eeprom: MAC: "); + for (i = 0; i < 5; i++) { + ((char*)eeprom) [i] = ethaddr [i]; + printk ("%02x:", (ethaddr [i] & 0xff)); + } + ((char*)eeprom) [i] = ethaddr [i]; + printk ("%02x\n", (ethaddr [i] & 0xff)); for (i = 0; i < 8; i++) write_srom_word(db, i, eeprom[i]); } --- uClinux-dist-orig/linux-2.6.x/drivers/net/Kconfig 2007-01-11 22:43:09.000000000 +1030 +++ uClinux-dist/linux-2.6.x/drivers/net/Kconfig 2007-05-06 16:08:30.000000000 +0930 @@ -908,7 +908,7 @@ config DM9000 tristate "DM9000 support" - depends on (ARM || MIPS) && NET_ETHERNET + depends on (ARM || MIPS || BFIN) && NET_ETHERNET select CRC32 select MII ---help---